Lines Matching +full:0 +full:x425
40 #clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
71 L2_CA15: cache-controller-0 {
82 #clock-cells = <0>;
84 clock-frequency = <0>;
97 #clock-cells = <0>;
99 clock-frequency = <0>;
113 reg = <0 0xe6020000 0 0x0c>;
123 reg = <0 0xe6050000 0 0x50>;
127 gpio-ranges = <&pfc 0 0 29>;
138 reg = <0 0xe6051000 0 0x50>;
142 gpio-ranges = <&pfc 0 32 23>;
153 reg = <0 0xe6052000 0 0x50>;
157 gpio-ranges = <&pfc 0 64 32>;
168 reg = <0 0xe6053000 0 0x50>;
172 gpio-ranges = <&pfc 0 96 28>;
183 reg = <0 0xe6054000 0 0x50>;
187 gpio-ranges = <&pfc 0 128 17>;
198 reg = <0 0xe6055000 0 0x50>;
202 gpio-ranges = <&pfc 0 160 17>;
213 reg = <0 0xe6055100 0 0x50>;
217 gpio-ranges = <&pfc 0 192 17>;
228 reg = <0 0xe6055200 0 0x50>;
232 gpio-ranges = <&pfc 0 224 17>;
243 reg = <0 0xe6055300 0 0x50>;
247 gpio-ranges = <&pfc 0 256 17>;
258 reg = <0 0xe6055400 0 0x50>;
262 gpio-ranges = <&pfc 0 288 17>;
273 reg = <0 0xe6055500 0 0x50>;
277 gpio-ranges = <&pfc 0 320 32>;
288 reg = <0 0xe6055600 0 0x50>;
292 gpio-ranges = <&pfc 0 352 30>;
302 reg = <0 0xe6060000 0 0x144>;
307 reg = <0 0xe6150000 0 0x1000>;
311 #power-domain-cells = <0>;
317 reg = <0 0xe6152000 0 0x188>;
323 reg = <0 0xe6160000 0 0x0100>;
328 reg = <0 0xe6180000 0 0x0200>;
336 reg = <0 0xe61c0000 0 0x200>;
337 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
348 reg = <0 0xe63a0000 0 0x12000>;
351 ranges = <0 0 0xe63a0000 0x12000>;
356 reg = <0 0xe63c0000 0 0x1000>;
359 ranges = <0 0 0xe63c0000 0x1000>;
361 smp-sram@0 {
363 reg = <0 0x100>;
371 reg = <0 0xe6508000 0 0x40>;
378 #size-cells = <0>;
385 reg = <0 0xe6518000 0 0x40>;
392 #size-cells = <0>;
399 reg = <0 0xe6530000 0 0x40>;
406 #size-cells = <0>;
413 reg = <0 0xe6540000 0 0x40>;
420 #size-cells = <0>;
427 reg = <0 0xe6520000 0 0x40>;
434 #size-cells = <0>;
441 reg = <0 0xe6528000 0 0x40>;
448 #size-cells = <0>;
454 #size-cells = <0>;
458 reg = <0 0xe60b0000 0 0x425>;
461 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
462 <&dmac1 0x77>, <&dmac1 0x78>;
472 reg = <0 0xe6700000 0 0x20000>;
505 reg = <0 0xe6720000 0 0x20000>;
538 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
545 #size-cells = <0>;
551 reg = <0 0xe6b10000 0 0x2c>;
554 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
555 <&dmac1 0x17>, <&dmac1 0x18>;
561 #size-cells = <0>;
568 reg = <0 0xe6e60000 0 64>;
573 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
574 <&dmac1 0x29>, <&dmac1 0x2a>;
584 reg = <0 0xe6e68000 0 64>;
589 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
590 <&dmac1 0x2d>, <&dmac1 0x2e>;
600 reg = <0 0xe6e58000 0 64>;
605 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
606 <&dmac1 0x2b>, <&dmac1 0x2c>;
616 reg = <0 0xe6ea8000 0 64>;
621 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
622 <&dmac1 0x2f>, <&dmac1 0x30>;
632 reg = <0 0xe62c0000 0 96>;
637 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
638 <&dmac1 0x39>, <&dmac1 0x3a>;
648 reg = <0 0xe62c8000 0 96>;
653 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
654 <&dmac1 0x4d>, <&dmac1 0x4e>;
664 reg = <0 0xe6e20000 0 0x0064>;
667 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
668 <&dmac1 0x51>, <&dmac1 0x52>;
673 #size-cells = <0>;
680 reg = <0 0xe6e10000 0 0x0064>;
683 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
684 <&dmac1 0x55>, <&dmac1 0x56>;
689 #size-cells = <0>;
696 reg = <0 0xe6e80000 0 0x1000>;
709 reg = <0 0xe6e88000 0 0x1000>;
722 reg = <0 0xe6ef0000 0 0x1000>;
733 reg = <0 0xe6ef1000 0 0x1000>;
744 reg = <0 0xe6ef2000 0 0x1000>;
755 reg = <0 0xe6ef3000 0 0x1000>;
766 reg = <0 0xe6ef4000 0 0x1000>;
777 reg = <0 0xe6ef5000 0 0x1000>;
788 reg = <0 0xee100000 0 0x328>;
789 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
790 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
791 <&dmac1 0xcd>, <&dmac1 0xce>;
803 reg = <0 0xf1001000 0 0x1000>,
804 <0 0xf1002000 0 0x2000>,
805 <0 0xf1004000 0 0x2000>,
806 <0 0xf1006000 0 0x2000>;
817 reg = <0 0xfe928000 0 0x8000>;
826 reg = <0 0xfe930000 0 0x8000>;
835 reg = <0 0xfe938000 0 0x8000>;
845 reg = <0 0xfe980000 0 0x10300>;
854 reg = <0 0xfeb00000 0 0x40000>;
858 clock-names = "du.0", "du.1";
860 reset-names = "du.0";
865 #size-cells = <0>;
867 port@0 {
868 reg = <0>;
882 reg = <0 0xff000044 0 4>;
888 reg = <0 0xffca0000 0 0x1004>;
902 reg = <0 0xe6130000 0 0x1004>;