Lines Matching +full:tsens +full:- +full:v1
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 interrupt-parent = <&intc>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
26 no-map;
31 no-map;
36 no-map;
41 no-map;
46 no-map;
51 no-map;
56 no-map;
61 no-map;
65 compatible = "qcom,rmtfs-mem";
67 no-map;
69 qcom,client-id = <1>;
74 #address-cells = <1>;
75 #size-cells = <0>;
80 enable-method = "qcom,kpss-acc-v2";
83 next-level-cache = <&L2>;
86 cpu-idle-states = <&CPU_SPC>;
91 enable-method = "qcom,kpss-acc-v2";
94 next-level-cache = <&L2>;
97 cpu-idle-states = <&CPU_SPC>;
102 enable-method = "qcom,kpss-acc-v2";
105 next-level-cache = <&L2>;
108 cpu-idle-states = <&CPU_SPC>;
113 enable-method = "qcom,kpss-acc-v2";
116 next-level-cache = <&L2>;
119 cpu-idle-states = <&CPU_SPC>;
122 L2: l2-cache {
124 cache-level = <2>;
128 idle-states {
130 compatible = "qcom,idle-state-spc",
131 "arm,idle-state";
132 entry-latency-us = <150>;
133 exit-latency-us = <200>;
134 min-residency-us = <2000>;
144 thermal-zones {
145 cpu-thermal0 {
146 polling-delay-passive = <250>;
147 polling-delay = <1000>;
149 thermal-sensors = <&tsens 5>;
165 cpu-thermal1 {
166 polling-delay-passive = <250>;
167 polling-delay = <1000>;
169 thermal-sensors = <&tsens 6>;
185 cpu-thermal2 {
186 polling-delay-passive = <250>;
187 polling-delay = <1000>;
189 thermal-sensors = <&tsens 7>;
205 cpu-thermal3 {
206 polling-delay-passive = <250>;
207 polling-delay = <1000>;
209 thermal-sensors = <&tsens 8>;
225 q6-dsp-thermal {
226 polling-delay-passive = <250>;
227 polling-delay = <1000>;
229 thermal-sensors = <&tsens 1>;
232 q6_dsp_alert0: trip-point0 {
240 modemtx-thermal {
241 polling-delay-passive = <250>;
242 polling-delay = <1000>;
244 thermal-sensors = <&tsens 2>;
247 modemtx_alert0: trip-point0 {
255 video-thermal {
256 polling-delay-passive = <250>;
257 polling-delay = <1000>;
259 thermal-sensors = <&tsens 3>;
262 video_alert0: trip-point0 {
270 wlan-thermal {
271 polling-delay-passive = <250>;
272 polling-delay = <1000>;
274 thermal-sensors = <&tsens 4>;
277 wlan_alert0: trip-point0 {
285 gpu-thermal-top {
286 polling-delay-passive = <250>;
287 polling-delay = <1000>;
289 thermal-sensors = <&tsens 9>;
292 gpu1_alert0: trip-point0 {
300 gpu-thermal-bottom {
301 polling-delay-passive = <250>;
302 polling-delay = <1000>;
304 thermal-sensors = <&tsens 10>;
307 gpu2_alert0: trip-point0 {
316 cpu-pmu {
317 compatible = "qcom,krait-pmu";
323 compatible = "fixed-clock";
324 #clock-cells = <0>;
325 clock-frequency = <19200000>;
329 compatible = "fixed-clock";
330 #clock-cells = <0>;
331 clock-frequency = <32768>;
336 compatible = "arm,armv7-timer";
341 clock-frequency = <19200000>;
344 adsp-pil {
345 compatible = "qcom,msm8974-adsp-pil";
347 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
352 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
354 cx-supply = <&pm8841_s2>;
357 clock-names = "xo";
359 memory-region = <&adsp_region>;
361 qcom,smem-states = <&adsp_smp2p_out 0>;
362 qcom,smem-state-names = "stop";
364 smd-edge {
368 qcom,smd-edge = <1>;
377 memory-region = <&smem_region>;
378 qcom,rpm-msg-ram = <&rpm_msg_ram>;
383 smp2p-adsp {
387 interrupt-parent = <&intc>;
392 qcom,local-pid = <0>;
393 qcom,remote-pid = <2>;
395 adsp_smp2p_out: master-kernel {
396 qcom,entry-name = "master-kernel";
397 #qcom,smem-state-cells = <1>;
400 adsp_smp2p_in: slave-kernel {
401 qcom,entry-name = "slave-kernel";
403 interrupt-controller;
404 #interrupt-cells = <2>;
408 smp2p-modem {
412 interrupt-parent = <&intc>;
417 qcom,local-pid = <0>;
418 qcom,remote-pid = <1>;
420 modem_smp2p_out: master-kernel {
421 qcom,entry-name = "master-kernel";
422 #qcom,smem-state-cells = <1>;
425 modem_smp2p_in: slave-kernel {
426 qcom,entry-name = "slave-kernel";
428 interrupt-controller;
429 #interrupt-cells = <2>;
433 smp2p-wcnss {
437 interrupt-parent = <&intc>;
442 qcom,local-pid = <0>;
443 qcom,remote-pid = <4>;
445 wcnss_smp2p_out: master-kernel {
446 qcom,entry-name = "master-kernel";
448 #qcom,smem-state-cells = <1>;
451 wcnss_smp2p_in: slave-kernel {
452 qcom,entry-name = "slave-kernel";
454 interrupt-controller;
455 #interrupt-cells = <2>;
462 #address-cells = <1>;
463 #size-cells = <0>;
465 qcom,ipc-1 = <&apcs 8 13>;
466 qcom,ipc-2 = <&apcs 8 9>;
467 qcom,ipc-3 = <&apcs 8 19>;
472 #qcom,smem-state-cells = <1>;
479 interrupt-controller;
480 #interrupt-cells = <2>;
487 interrupt-controller;
488 #interrupt-cells = <2>;
495 interrupt-controller;
496 #interrupt-cells = <2>;
504 clock-names = "core", "bus", "iface";
509 #address-cells = <1>;
510 #size-cells = <1>;
512 compatible = "simple-bus";
514 intc: interrupt-controller@f9000000 {
515 compatible = "qcom,msm-qgic2";
516 interrupt-controller;
517 #interrupt-cells = <3>;
528 #address-cells = <1>;
529 #size-cells = <1>;
540 tsens: thermal-sensor@fc4a9000 { label
541 compatible = "qcom,msm8974-tsens";
544 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
545 nvmem-cell-names = "calib", "calib_backup";
548 interrupt-names = "uplow";
549 #thermal-sensor-cells = <1>;
553 #address-cells = <1>;
554 #size-cells = <1>;
556 compatible = "arm,armv7-timer-mem";
558 clock-frequency = <19200000>;
561 frame-number = <0>;
569 frame-number = <1>;
576 frame-number = <2>;
583 frame-number = <3>;
590 frame-number = <4>;
597 frame-number = <5>;
604 frame-number = <6>;
611 saw0: power-controller@f9089000 {
612 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
616 saw1: power-controller@f9099000 {
617 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
621 saw2: power-controller@f90a9000 {
622 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
626 saw3: power-controller@f90b9000 {
627 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
631 saw_l2: power-controller@f9012000 {
637 acc0: clock-controller@f9088000 {
638 compatible = "qcom,kpss-acc-v2";
642 acc1: clock-controller@f9098000 {
643 compatible = "qcom,kpss-acc-v2";
647 acc2: clock-controller@f90a8000 {
648 compatible = "qcom,kpss-acc-v2";
652 acc3: clock-controller@f90b8000 {
653 compatible = "qcom,kpss-acc-v2";
662 gcc: clock-controller@fc400000 {
663 compatible = "qcom,gcc-msm8974";
664 #clock-cells = <1>;
665 #reset-cells = <1>;
666 #power-domain-cells = <1>;
680 mmcc: clock-controller@fd8c0000 {
681 compatible = "qcom,mmcc-msm8974";
682 #clock-cells = <1>;
683 #reset-cells = <1>;
684 #power-domain-cells = <1>;
688 tcsr_mutex: tcsr-mutex {
689 compatible = "qcom,tcsr-mutex";
692 #hwlock-cells = <1>;
696 compatible = "qcom,rpm-msg-ram";
701 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
705 clock-names = "core", "iface";
710 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
714 clock-names = "core", "iface";
719 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
723 clock-names = "core", "iface";
728 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
732 clock-names = "core", "iface";
737 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
741 clock-names = "core", "iface";
746 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
748 reg-names = "hc_mem", "core_mem";
751 interrupt-names = "hc_irq", "pwr_irq";
755 clock-names = "core", "iface", "xo";
760 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
762 reg-names = "hc_mem", "core_mem";
765 interrupt-names = "hc_irq", "pwr_irq";
769 clock-names = "core", "iface", "xo";
774 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
776 reg-names = "hc_mem", "core_mem";
779 interrupt-names = "hc_irq", "pwr_irq";
783 clock-names = "core", "iface", "xo";
788 compatible = "qcom,ci-hdrc";
794 clock-names = "iface", "core";
795 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
796 assigned-clock-rates = <75000000>;
798 reset-names = "core";
801 ahb-burst-config = <0>;
802 phy-names = "usb-phy";
804 #reset-cells = <1>;
808 compatible = "qcom,usb-hs-phy-msm8974",
809 "qcom,usb-hs-phy";
810 #phy-cells = <0>;
812 clock-names = "ref", "sleep";
814 reset-names = "phy", "por";
819 compatible = "qcom,usb-hs-phy-msm8974",
820 "qcom,usb-hs-phy";
821 #phy-cells = <0>;
823 clock-names = "ref", "sleep";
825 reset-names = "phy", "por";
835 clock-names = "core";
839 compatible = "qcom,msm8974-mss-pil";
841 reg-names = "qdsp6", "rmb";
843 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
848 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
854 clock-names = "iface", "bus", "mem", "xo";
857 reset-names = "mss_restart";
859 cx-supply = <&pm8841_s2>;
860 mss-supply = <&pm8841_s3>;
861 mx-supply = <&pm8841_s1>;
862 pll-supply = <&pm8941_l12>;
864 qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
866 qcom,smem-states = <&modem_smp2p_out 0>;
867 qcom,smem-state-names = "stop";
870 memory-region = <&mba_region>;
874 memory-region = <&mpss_region>;
877 smd-edge {
881 qcom,smd-edge = <0>;
888 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
890 reg-names = "ccu", "dxe", "pmu";
892 memory-region = <&wcnss_region>;
894 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
899 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
901 vddpx-supply = <&pm8941_s3>;
903 qcom,smem-states = <&wcnss_smp2p_out 0>;
904 qcom,smem-state-names = "stop";
912 clock-names = "xo";
914 vddxo-supply = <&pm8941_l6>;
915 vddrfa-supply = <&pm8941_l11>;
916 vddpa-supply = <&pm8941_l19>;
917 vdddig-supply = <&pm8941_s3>;
920 smd-edge {
924 qcom,smd-edge = <6>;
928 qcom,smd-channels = "WCNSS_CTRL";
934 compatible = "qcom,wcnss-bt";
938 compatible = "qcom,wcnss-wlan";
942 interrupt-names = "tx", "rx";
944 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
945 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
952 compatible = "qcom,msm8974-pinctrl";
954 gpio-controller;
955 gpio-ranges = <&msmgpio 0 0 146>;
956 #gpio-cells = <2>;
957 interrupt-controller;
958 #interrupt-cells = <2>;
964 compatible = "qcom,i2c-qup-v2.1.1";
968 clock-names = "core", "iface";
969 #address-cells = <1>;
970 #size-cells = <0>;
975 compatible = "qcom,i2c-qup-v2.1.1";
979 clock-names = "core", "iface";
980 #address-cells = <1>;
981 #size-cells = <0>;
986 compatible = "qcom,i2c-qup-v2.1.1";
990 clock-names = "core", "iface";
991 #address-cells = <1>;
992 #size-cells = <0>;
997 compatible = "qcom,i2c-qup-v2.1.1";
1001 clock-names = "core", "iface";
1002 #address-cells = <1>;
1003 #size-cells = <0>;
1008 compatible = "qcom,i2c-qup-v2.1.1";
1012 clock-names = "core", "iface";
1013 #address-cells = <1>;
1014 #size-cells = <0>;
1019 compatible = "qcom,i2c-qup-v2.1.1";
1023 clock-names = "core", "iface";
1024 #address-cells = <1>;
1025 #size-cells = <0>;
1027 dma-names = "tx", "rx";
1032 compatible = "qcom,i2c-qup-v2.1.1";
1036 clock-names = "core", "iface";
1037 #address-cells = <1>;
1038 #size-cells = <0>;
1042 compatible = "qcom,spmi-pmic-arb";
1043 reg-names = "core", "intr", "cnfg";
1047 interrupt-names = "periph_irq";
1051 #address-cells = <2>;
1052 #size-cells = <0>;
1053 interrupt-controller;
1054 #interrupt-cells = <4>;
1057 blsp2_dma: dma-controller@f9944000 {
1058 compatible = "qcom,bam-v1.4.0";
1062 clock-names = "bam_clk";
1063 #dma-cells = <1>;
1068 compatible = "arm,coresight-tmc", "arm,primecell";
1072 clock-names = "apb_pclk", "atclk";
1074 in-ports {
1077 remote-endpoint = <&replicator_out0>;
1084 compatible = "arm,coresight-tpiu", "arm,primecell";
1088 clock-names = "apb_pclk", "atclk";
1090 in-ports {
1093 remote-endpoint = <&replicator_out1>;
1100 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
1104 clock-names = "apb_pclk", "atclk";
1106 out-ports {
1107 #address-cells = <1>;
1108 #size-cells = <0>;
1113 remote-endpoint = <&etr_in>;
1119 remote-endpoint = <&tpiu_in>;
1124 in-ports {
1127 remote-endpoint = <&etf_out>;
1134 compatible = "arm,coresight-tmc", "arm,primecell";
1138 clock-names = "apb_pclk", "atclk";
1140 out-ports {
1143 remote-endpoint = <&replicator_in>;
1148 in-ports {
1151 remote-endpoint = <&merger_out>;
1158 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1162 clock-names = "apb_pclk", "atclk";
1164 in-ports {
1165 #address-cells = <1>;
1166 #size-cells = <0>;
1170 * 0 - connected trought funnel to Audio, Modem and
1172 * 2...7 - not-connected
1177 remote-endpoint = <&funnel1_out>;
1182 out-ports {
1185 remote-endpoint = <&etf_in>;
1192 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1196 clock-names = "apb_pclk", "atclk";
1198 in-ports {
1199 #address-cells = <1>;
1200 #size-cells = <0>;
1204 * 0 - not-connected
1205 * 1 - connected trought funnel to Multimedia CPU
1206 * 2 - connected to Wireless CPU
1207 * 3 - not-connected
1208 * 4 - not-connected
1209 * 6 - not-connected
1210 * 7 - connected to STM
1215 remote-endpoint = <&kpss_out>;
1220 out-ports {
1223 remote-endpoint = <&merger_in1>;
1230 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1234 clock-names = "apb_pclk", "atclk";
1236 in-ports {
1237 #address-cells = <1>;
1238 #size-cells = <0>;
1243 remote-endpoint = <&etm0_out>;
1249 remote-endpoint = <&etm1_out>;
1255 remote-endpoint = <&etm2_out>;
1261 remote-endpoint = <&etm3_out>;
1266 out-ports {
1269 remote-endpoint = <&funnel1_in5>;
1276 compatible = "arm,coresight-etm4x", "arm,primecell";
1280 clock-names = "apb_pclk", "atclk";
1284 out-ports {
1287 remote-endpoint = <&kpss_in0>;
1294 compatible = "arm,coresight-etm4x", "arm,primecell";
1298 clock-names = "apb_pclk", "atclk";
1302 out-ports {
1305 remote-endpoint = <&kpss_in1>;
1312 compatible = "arm,coresight-etm4x", "arm,primecell";
1316 clock-names = "apb_pclk", "atclk";
1320 out-ports {
1323 remote-endpoint = <&kpss_in2>;
1330 compatible = "arm,coresight-etm4x", "arm,primecell";
1334 clock-names = "apb_pclk", "atclk";
1338 out-ports {
1341 remote-endpoint = <&kpss_in3>;
1348 compatible = "qcom,msm8974-ocmem";
1351 reg-names = "ctrl",
1355 clock-names = "core",
1358 #address-cells = <1>;
1359 #size-cells = <1>;
1361 gmu_sram: gmu-sram@0 {
1368 compatible = "qcom,msm8974-bimc";
1369 #interconnect-cells = <1>;
1370 clock-names = "bus", "bus_a";
1377 compatible = "qcom,msm8974-snoc";
1378 #interconnect-cells = <1>;
1379 clock-names = "bus", "bus_a";
1386 compatible = "qcom,msm8974-pnoc";
1387 #interconnect-cells = <1>;
1388 clock-names = "bus", "bus_a";
1395 compatible = "qcom,msm8974-ocmemnoc";
1396 #interconnect-cells = <1>;
1397 clock-names = "bus", "bus_a";
1404 compatible = "qcom,msm8974-mmssnoc";
1405 #interconnect-cells = <1>;
1406 clock-names = "bus", "bus_a";
1413 compatible = "qcom,msm8974-cnoc";
1414 #interconnect-cells = <1>;
1415 clock-names = "bus", "bus_a";
1423 compatible = "qcom,adreno-330.1",
1426 reg-names = "kgsl_3d0_reg_memory";
1428 interrupt-names = "kgsl_3d0_irq";
1429 clock-names = "core",
1436 power-domains = <&mmcc OXILICX_GDSC>;
1437 operating-points-v2 = <&gpu_opp_table>;
1441 interconnect-names = "gfx-mem",
1447 compatible = "operating-points-v2";
1449 opp-320000000 {
1450 opp-hz = /bits/ 64 <320000000>;
1453 opp-200000000 {
1454 opp-hz = /bits/ 64 <200000000>;
1457 opp-27000000 {
1458 opp-hz = /bits/ 64 <27000000>;
1469 reg-names = "mdss_phys",
1472 power-domains = <&mmcc MDSS_GDSC>;
1477 clock-names = "iface",
1483 interrupt-controller;
1484 #interrupt-cells = <1>;
1486 #address-cells = <1>;
1487 #size-cells = <1>;
1495 reg-names = "mdp_phys";
1497 interrupt-parent = <&mdss>;
1504 clock-names = "iface",
1510 interconnect-names = "mdp0-mem";
1513 #address-cells = <1>;
1514 #size-cells = <0>;
1519 remote-endpoint = <&dsi0_in>;
1528 compatible = "qcom,mdss-dsi-ctrl";
1530 reg-names = "dsi_ctrl";
1532 interrupt-parent = <&mdss>;
1535 assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
1537 assigned-clock-parents = <&dsi_phy0 0>,
1547 clock-names = "mdp_core",
1556 phy-names = "dsi-phy";
1559 #address-cells = <1>;
1560 #size-cells = <0>;
1565 remote-endpoint = <&mdp5_intf1_out>;
1577 dsi_phy0: dsi-phy@fd922a00 {
1580 compatible = "qcom,dsi-phy-28nm-hpm";
1584 reg-names = "dsi_pll",
1588 #clock-cells = <1>;
1589 #phy-cells = <0>;
1590 qcom,dsi-phy-index = <0>;
1593 clock-names = "iface";
1599 compatible = "syscon", "simple-mfd";
1602 reboot-mode {
1603 compatible = "syscon-reboot-mode";
1615 qcom,smd-edge = <15>;
1618 compatible = "qcom,rpm-msm8974";
1619 qcom,smd-channels = "rpm_requests";
1621 rpmcc: clock-controller {
1622 compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";
1623 #clock-cells = <1>;
1626 pm8841-regulators {
1627 compatible = "qcom,rpm-pm8841-regulators";
1639 pm8941-regulators {
1640 compatible = "qcom,rpm-pm8941-regulators";
1679 vreg_boost: vreg-boost {
1680 compatible = "regulator-fixed";
1682 regulator-name = "vreg-boost";
1683 regulator-min-microvolt = <3150000>;
1684 regulator-max-microvolt = <3150000>;
1686 regulator-always-on;
1687 regulator-boot-on;
1690 enable-active-high;
1692 pinctrl-names = "default";
1693 pinctrl-0 = <&boost_bypass_n_pin>;
1695 vreg_vph_pwr: vreg-vph-pwr {
1696 compatible = "regulator-fixed";
1697 regulator-name = "vph-pwr";
1699 regulator-min-microvolt = <3600000>;
1700 regulator-max-microvolt = <3600000>;
1702 regulator-always-on;