Lines Matching +full:usb +full:- +full:hs +full:- +full:ipq4019 +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 model = "Qualcomm Technologies, Inc. IPQ4019";
17 compatible = "qcom,ipq4019";
18 interrupt-parent = <&intc>;
20 reserved-memory {
21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
27 no-map;
32 no-map;
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "arm,cortex-a7";
49 enable-method = "qcom,kpss-acc-v2";
50 next-level-cache = <&L2>;
55 clock-frequency = <0>;
56 clock-latency = <256000>;
57 operating-points-v2 = <&cpu0_opp_table>;
62 compatible = "arm,cortex-a7";
63 enable-method = "qcom,kpss-acc-v2";
64 next-level-cache = <&L2>;
69 clock-frequency = <0>;
70 clock-latency = <256000>;
71 operating-points-v2 = <&cpu0_opp_table>;
76 compatible = "arm,cortex-a7";
77 enable-method = "qcom,kpss-acc-v2";
78 next-level-cache = <&L2>;
83 clock-frequency = <0>;
84 clock-latency = <256000>;
85 operating-points-v2 = <&cpu0_opp_table>;
90 compatible = "arm,cortex-a7";
91 enable-method = "qcom,kpss-acc-v2";
92 next-level-cache = <&L2>;
97 clock-frequency = <0>;
98 clock-latency = <256000>;
99 operating-points-v2 = <&cpu0_opp_table>;
102 L2: l2-cache {
104 cache-level = <2>;
110 compatible = "operating-points-v2";
111 opp-shared;
113 opp-48000000 {
114 opp-hz = /bits/ 64 <48000000>;
115 clock-latency-ns = <256000>;
117 opp-200000000 {
118 opp-hz = /bits/ 64 <200000000>;
119 clock-latency-ns = <256000>;
121 opp-500000000 {
122 opp-hz = /bits/ 64 <500000000>;
123 clock-latency-ns = <256000>;
125 opp-716000000 {
126 opp-hz = /bits/ 64 <716000000>;
127 clock-latency-ns = <256000>;
137 compatible = "arm,cortex-a7-pmu";
144 compatible = "fixed-clock";
145 clock-frequency = <32768>;
146 #clock-cells = <0>;
150 compatible = "fixed-clock";
151 clock-frequency = <48000000>;
152 #clock-cells = <0>;
158 compatible = "qcom,scm-ipq4019";
163 compatible = "arm,armv7-timer";
168 clock-frequency = <48000000>;
169 always-on;
173 #address-cells = <1>;
174 #size-cells = <1>;
176 compatible = "simple-bus";
178 intc: interrupt-controller@b000000 {
179 compatible = "qcom,msm-qgic2";
180 interrupt-controller;
181 #interrupt-cells = <3>;
186 gcc: clock-controller@1800000 {
187 compatible = "qcom,gcc-ipq4019";
188 #clock-cells = <1>;
189 #reset-cells = <1>;
197 clock-names = "core";
202 compatible = "qcom,ipq4019-pinctrl";
204 gpio-controller;
205 gpio-ranges = <&tlmm 0 0 100>;
206 #gpio-cells = <2>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
213 compatible = "qcom,vqmmc-ipq4019-regulator";
215 regulator-name = "vqmmc";
216 regulator-min-microvolt = <1500000>;
217 regulator-max-microvolt = <3000000>;
218 regulator-always-on;
223 compatible = "qcom,sdhci-msm-v4";
226 interrupt-names = "hc_irq", "pwr_irq";
227 bus-width = <8>;
230 clock-names = "core", "iface", "xo";
235 compatible = "qcom,bam-v1.7.0";
239 clock-names = "bam_clk";
240 #dma-cells = <1>;
246 compatible = "qcom,spi-qup-v2.2.1";
251 clock-names = "core", "iface";
252 #address-cells = <1>;
253 #size-cells = <0>;
255 dma-names = "rx", "tx";
260 compatible = "qcom,spi-qup-v2.2.1";
265 clock-names = "core", "iface";
266 #address-cells = <1>;
267 #size-cells = <0>;
269 dma-names = "rx", "tx";
274 compatible = "qcom,i2c-qup-v2.2.1";
279 clock-names = "iface", "core";
280 #address-cells = <1>;
281 #size-cells = <0>;
283 dma-names = "rx", "tx";
288 compatible = "qcom,i2c-qup-v2.2.1";
293 clock-names = "iface", "core";
294 #address-cells = <1>;
295 #size-cells = <0>;
297 dma-names = "rx", "tx";
302 compatible = "qcom,bam-v1.7.0";
306 clock-names = "bam_clk";
307 #dma-cells = <1>;
309 qcom,controlled-remotely;
314 compatible = "qcom,crypto-v5.1";
319 clock-names = "iface", "bus", "core";
321 dma-names = "rx", "tx";
325 acc0: clock-controller@b088000 {
326 compatible = "qcom,kpss-acc-v2";
330 acc1: clock-controller@b098000 {
331 compatible = "qcom,kpss-acc-v2";
335 acc2: clock-controller@b0a8000 {
336 compatible = "qcom,kpss-acc-v2";
340 acc3: clock-controller@b0b8000 {
341 compatible = "qcom,kpss-acc-v2";
376 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
382 clock-names = "core", "iface";
384 dma-names = "rx", "tx";
388 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
394 clock-names = "core", "iface";
396 dma-names = "rx", "tx";
400 compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019";
403 timeout-sec = <10>;
413 compatible = "qcom,pcie-ipq4019", "snps,dw-pcie";
418 reg-names = "dbi", "elbi", "parf", "config";
420 linux,pci-domain = <0>;
421 bus-range = <0x00 0xff>;
422 num-lanes = <1>;
423 #address-cells = <3>;
424 #size-cells = <2>;
430 interrupt-names = "msi";
431 #interrupt-cells = <1>;
432 interrupt-map-mask = <0 0 0 0x7>;
433 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
440 clock-names = "aux",
456 reset-names = "axi_m",
462 "phy",
473 compatible = "qcom,bam-v1.7.0";
477 clock-names = "bam_clk";
478 #dma-cells = <1>;
483 nand: nand-controller@79b0000 {
484 compatible = "qcom,ipq4019-nand";
486 #address-cells = <1>;
487 #size-cells = <0>;
490 clock-names = "core", "aon";
495 dma-names = "tx", "rx", "cmd";
501 nand-ecc-strength = <4>;
502 nand-ecc-step-size = <512>;
503 nand-bus-width = <8>;
508 compatible = "qcom,ipq4019-wifi";
516 reset-names = "wifi_cpu_init", "wifi_radio_srif",
522 clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
541 interrupt-names = "msi0", "msi1", "msi2", "msi3",
550 compatible = "qcom,ipq4019-wifi";
558 reset-names = "wifi_cpu_init", "wifi_radio_srif",
564 clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
583 interrupt-names = "msi0", "msi1", "msi2", "msi3",
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "qcom,ipq4019-mdio";
598 ethphy0: ethernet-phy@0 {
602 ethphy1: ethernet-phy@1 {
606 ethphy2: ethernet-phy@2 {
610 ethphy3: ethernet-phy@3 {
614 ethphy4: ethernet-phy@4 {
620 compatible = "qcom,usb-ss-ipq4019-phy";
621 #phy-cells = <0>;
623 reg-names = "phy_base";
625 reset-names = "por_rst";
630 compatible = "qcom,usb-hs-ipq4019-phy";
631 #phy-cells = <0>;
633 reg-names = "phy_base";
635 reset-names = "por_rst", "srif_rst";
642 #address-cells = <1>;
643 #size-cells = <1>;
647 clock-names = "master", "sleep", "mock_utmi";
656 phy-names = "usb2-phy", "usb3-phy";
662 compatible = "qcom,usb-hs-ipq4019-phy";
663 #phy-cells = <0>;
665 reg-names = "phy_base";
667 reset-names = "por_rst", "srif_rst";
674 #address-cells = <1>;
675 #size-cells = <1>;
679 clock-names = "master", "sleep", "mock_utmi";
688 phy-names = "usb2-phy";