Lines Matching +full:0 +full:x01948000

21 		#address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
81 reg = <0x2>;
83 clock-frequency = <0>;
95 reg = <0x3>;
97 clock-frequency = <0>;
133 reg = <0x0 0x0>;
146 #clock-cells = <0>;
152 #clock-cells = <0>;
164 interrupts = <1 2 0xf08>,
165 <1 3 0xf08>,
166 <1 4 0xf08>,
167 <1 1 0xf08>;
182 reg = <0x0b000000 0x1000>,
183 <0x0b002000 0x1000>;
190 reg = <0x1800000 0x60000>;
195 reg = <0x22000 0x140>;
203 reg = <0x01000000 0x300000>;
205 gpio-ranges = <&tlmm 0 0 100>;
214 reg = <0x01948000 0x4>;
224 reg = <0x7824900 0x11c>, <0x7824000 0x800>;
236 reg = <0x07884000 0x23000>;
241 qcom,ee = <0>;
247 reg = <0x78b5000 0x600>;
253 #size-cells = <0>;
261 reg = <0x78b6000 0x600>;
267 #size-cells = <0>;
275 reg = <0x78b7000 0x600>;
281 #size-cells = <0>;
289 reg = <0x78b8000 0x600>;
295 #size-cells = <0>;
303 reg = <0x08e04000 0x20000>;
315 reg = <0x08e3a000 0x6000>;
327 reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
332 reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
337 reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
342 reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
347 reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
353 reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
359 reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
365 reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
371 reg = <0xb012000 0x1000>;
377 reg = <0x78af000 0x200>;
383 dmas = <&blsp_dma 1>, <&blsp_dma 0>;
389 reg = <0x78b0000 0x200>;
401 reg = <0xb017000 0x40>;
409 reg = <0x4ab000 0x4>;
414 reg = <0x40000000 0xf1d
415 0x40000f20 0xa8
416 0x80000 0x2000
417 0x40100000 0x1000>;
420 linux,pci-domain = <0>;
421 bus-range = <0x00 0xff>;
426 ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
427 <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;
432 interrupt-map-mask = <0 0 0 0x7>;
433 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
434 <0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
435 <0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
436 <0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
474 reg = <0x7984000 0x1a000>;
479 qcom,ee = <0>;
485 reg = <0x79b0000 0x1000>;
487 #size-cells = <0>;
492 dmas = <&qpic_bam 0>,
498 nand@0 {
499 reg = <0>;
509 reg = <0xa000000 0x200000>;
551 reg = <0xa800000 0x200000>;
593 #size-cells = <0>;
595 reg = <0x90000 0x64>;
598 ethphy0: ethernet-phy@0 {
599 reg = <0>;
621 #phy-cells = <0>;
622 reg = <0x9a000 0x800>;
631 #phy-cells = <0>;
632 reg = <0xa6000 0x40>;
641 reg = <0x8af8800 0x100>;
653 reg = <0x8a00000 0xf8000>;
663 #phy-cells = <0>;
664 reg = <0xa8000 0x40>;
673 reg = <0x60f8800 0x100>;
685 reg = <0x6000000 0xf8000>;