Lines Matching +full:0 +full:x10209100
22 reg = <0 0x13000000 0 0x200>;
29 reg = <0 0x13040000 0 0x30000>;
55 reg = <0 0x14000000 0 0x1000>;
62 reg = <0 0x14010000 0 0x1000>;
64 mediatek,larb-id = <0>;
74 reg = <0 0x16010000 0 0x1000>;
86 reg = <0 0x15001000 0 0x1000>;
99 reg = <0 0x15000000 0 0x1000>;
106 reg = <0 0x10205000 0 0x1000>;
117 reg = <0 0x15004000 0 0x1000>;
132 reg = <0 0x1000c000 0 0x1000>;
143 reg = <0 0x14007000 0 0x1000>;
153 reg = <0 0x14008000 0 0x1000>;
163 reg = <0 0x14009000 0 0x1000>;
173 reg = <0 0x1400a000 0 0x1000>;
184 reg = <0 0x1400b000 0 0x1000>;
192 reg = <0 0x1400c000 0 0x1000>;
206 reg = <0 0x1400e000 0 0x1000>;
214 reg = <0 0x14012000 0 0x1000>;
224 reg = <0 0x14014000 0 0x1000>;
236 reg = <0 0x14015000 0 0x400>;
244 mediatek,syscon-hdmi = <&mmsys 0x900>;
252 reg = <0 0x10010000 0 0x90>;
255 #clock-cells = <0>;
256 #phy-cells = <0>;
262 reg = <0 0x10012000 0 0xbc>;
271 reg = <0 0x10209100 0 0x24>;
275 #clock-cells = <0>;
276 #phy-cells = <0>;
284 reg = <0 0x11013000 0 0x1C>;