Lines Matching +full:ixp4xx +full:- +full:network +full:- +full:processing +full:- +full:engine

1 // SPDX-License-Identifier: ISC
3  * Device Tree file for Intel XScale Network Processors
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/gpio/gpio.h>
11 		#address-cells = <1>;
12 		#size-cells = <1>;
14 		compatible = "simple-bus";
15 		interrupt-parent = <&intcon>;
18 		 * The IXP4xx expansion bus is a set of up to 7 each up to 16MB
22 			/* compatible and reg filled in by per-soc device tree */
23 			native-endian;
24 			#address-cells = <2>;
25 			#size-cells = <1>;
34 			dma-ranges = <0 0x0 0x50000000 0x01000000>,
44 		qmgr: queue-manager@60000000 {
45 			compatible = "intel,ixp4xx-ahb-queue-manager";
51 			/* compatible filled in by per-soc device tree */
56 			#address-cells = <3>;
57 			#size-cells = <2>;
59 			bus-range = <0x00 0xff>;
64 			 * 64MB 32bit non-prefetchable memory 0x48000000-0x4bffffff
78 			dma-ranges =
81 			#interrupt-cells = <1>;
82 			interrupt-map-mask = <0xf800 0 0 7>;
87 			compatible = "intel,xscale-uart";
90 			 * The reg-offset and reg-shift is a side effect
93 			reg-offset = <3>;
94 			reg-shift = <2>;
96 			clock-frequency = <14745600>;
97 			no-loopback-test;
101 			compatible = "intel,xscale-uart";
104 			 * The reg-offset and reg-shift is a side effect
107 			reg-offset = <3>;
108 			reg-shift = <2>;
110 			clock-frequency = <14745600>;
111 			no-loopback-test;
115 			compatible = "intel,ixp4xx-gpio";
117 			gpio-controller;
118 			#gpio-cells = <2>;
119 			interrupt-controller;
120 			#interrupt-cells = <2>;
123 		intcon: interrupt-controller@c8003000 {
131 			interrupt-controller;
132 			#interrupt-cells = <2>;
136 			compatible = "intel,ixp4xx-timer";
142 			compatible = "intel,ixp4xx-network-processing-engine";
145 			/* NPE-C contains a crypto accelerator */
147 				compatible = "intel,ixp4xx-crypto";
148 				intel,npe-handle = <&npe 2>;
149 				queue-rx = <&qmgr 30>;
150 				queue-txready = <&qmgr 29>;
156 			compatible = "intel,ixp4xx-ethernet";
160 			queue-rx = <&qmgr 3>;
161 			queue-txready = <&qmgr 20>;
162 			intel,npe-handle = <&npe 1>;
167 			compatible = "intel,ixp4xx-ethernet";
171 			queue-rx = <&qmgr 0>;
172 			queue-txready = <&qmgr 0>;
173 			intel,npe-handle = <&npe 2>;
178 			compatible = "intel,ixp4xx-ethernet";
183 			queue-rx = <&qmgr 0>;
184 			queue-txready = <&qmgr 0>;