Lines Matching +full:imx21 +full:- +full:kpp
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
58 #size-cells = <0>;
61 compatible = "arm,cortex-a7";
64 clock-frequency = <696000000>;
65 clock-latency = <61036>; /* two CLK32 periods */
66 #cooling-cells = <2>;
67 operating-points = <
74 fsl,soc-operating-points = <
88 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
91 arm-supply = <®_arm>;
92 soc-supply = <®_soc>;
93 nvmem-cells = <&cpu_speed_grade>;
94 nvmem-cell-names = "speed_grade";
99 compatible = "arm,armv7-timer";
104 interrupt-parent = <&intc>;
108 ckil: clock-cli {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <32768>;
112 clock-output-names = "ckil";
115 osc: clock-osc {
116 compatible = "fixed-clock";
117 #clock-cells = <0>;
118 clock-frequency = <24000000>;
119 clock-output-names = "osc";
122 ipp_di0: clock-di0 {
123 compatible = "fixed-clock";
124 #clock-cells = <0>;
125 clock-frequency = <0>;
126 clock-output-names = "ipp_di0";
129 ipp_di1: clock-di1 {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 clock-frequency = <0>;
133 clock-output-names = "ipp_di1";
137 compatible = "arm,cortex-a7-pmu";
138 interrupt-parent = <&gpc>;
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "simple-bus";
146 interrupt-parent = <&gpc>;
150 compatible = "mmio-sram";
154 intc: interrupt-controller@a01000 {
155 compatible = "arm,gic-400", "arm,cortex-a7-gic";
157 #interrupt-cells = <3>;
158 interrupt-controller;
159 interrupt-parent = <&intc>;
166 dma_apbh: dma-apbh@1804000 {
167 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
173 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
174 #dma-cells = <1>;
175 dma-channels = <4>;
179 gpmi: nand-controller@1806000 {
180 compatible = "fsl,imx6q-gpmi-nand";
181 #address-cells = <1>;
182 #size-cells = <1>;
184 reg-names = "gpmi-nand", "bch";
186 interrupt-names = "bch";
192 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
195 dma-names = "rx-tx";
200 compatible = "fsl,aips-bus", "simple-bus";
201 #address-cells = <1>;
202 #size-cells = <1>;
206 spba-bus@2000000 {
207 compatible = "fsl,spba-bus", "simple-bus";
208 #address-cells = <1>;
209 #size-cells = <1>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
221 clock-names = "ipg", "per";
223 dma-names = "rx", "tx";
228 #address-cells = <1>;
229 #size-cells = <0>;
230 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
235 clock-names = "ipg", "per";
237 dma-names = "rx", "tx";
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
249 clock-names = "ipg", "per";
251 dma-names = "rx", "tx";
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
263 clock-names = "ipg", "per";
265 dma-names = "rx", "tx";
270 compatible = "fsl,imx6ul-uart",
271 "fsl,imx6q-uart";
276 clock-names = "ipg", "per";
281 compatible = "fsl,imx6ul-uart",
282 "fsl,imx6q-uart";
287 clock-names = "ipg", "per";
292 compatible = "fsl,imx6ul-uart",
293 "fsl,imx6q-uart";
298 clock-names = "ipg", "per";
303 #sound-dai-cells = <0>;
304 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
310 clock-names = "bus", "mclk1", "mclk2", "mclk3";
313 dma-names = "rx", "tx";
318 #sound-dai-cells = <0>;
319 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
325 clock-names = "bus", "mclk1", "mclk2", "mclk3";
328 dma-names = "rx", "tx";
333 #sound-dai-cells = <0>;
334 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
340 clock-names = "bus", "mclk1", "mclk2", "mclk3";
343 dma-names = "rx", "tx";
348 compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
358 clock-names = "mem", "ipg", "asrck_0",
365 dma-names = "rxa", "rxb", "rxc",
367 fsl,asrc-rate = <48000>;
368 fsl,asrc-width = <16>;
374 compatible = "fsl,imx6ul-tsc";
380 clock-names = "tsc", "adc";
385 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
390 clock-names = "ipg", "per";
391 #pwm-cells = <3>;
396 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
401 clock-names = "ipg", "per";
402 #pwm-cells = <3>;
407 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
412 clock-names = "ipg", "per";
413 #pwm-cells = <3>;
418 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
423 clock-names = "ipg", "per";
424 #pwm-cells = <3>;
429 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
434 clock-names = "ipg", "per";
435 fsl,stop-mode = <&gpr 0x10 1>;
440 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
445 clock-names = "ipg", "per";
446 fsl,stop-mode = <&gpr 0x10 2>;
451 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
456 clock-names = "ipg", "per";
460 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
465 gpio-controller;
466 #gpio-cells = <2>;
467 interrupt-controller;
468 #interrupt-cells = <2>;
469 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
474 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
479 gpio-controller;
480 #gpio-cells = <2>;
481 interrupt-controller;
482 #interrupt-cells = <2>;
483 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
487 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
492 gpio-controller;
493 #gpio-cells = <2>;
494 interrupt-controller;
495 #interrupt-cells = <2>;
496 gpio-ranges = <&iomuxc 0 65 29>;
500 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
505 gpio-controller;
506 #gpio-cells = <2>;
507 interrupt-controller;
508 #interrupt-cells = <2>;
509 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
513 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
518 gpio-controller;
519 #gpio-cells = <2>;
520 interrupt-controller;
521 #interrupt-cells = <2>;
522 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
526 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
528 interrupt-names = "int0", "pps";
536 clock-names = "ipg", "ahb", "ptp",
538 fsl,num-tx-queues = <1>;
539 fsl,num-rx-queues = <1>;
540 fsl,stop-mode = <&gpr 0x10 4>;
541 fsl,magic-packet;
545 kpp: keypad@20b8000 { label
546 compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp";
554 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
561 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
568 clks: clock-controller@20c4000 {
569 compatible = "fsl,imx6ul-ccm";
573 #clock-cells = <1>;
575 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
579 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
580 "syscon", "simple-mfd";
586 reg_3p0: regulator-3p0 {
587 compatible = "fsl,anatop-regulator";
588 regulator-name = "vdd3p0";
589 regulator-min-microvolt = <2625000>;
590 regulator-max-microvolt = <3400000>;
591 anatop-reg-offset = <0x120>;
592 anatop-vol-bit-shift = <8>;
593 anatop-vol-bit-width = <5>;
594 anatop-min-bit-val = <0>;
595 anatop-min-voltage = <2625000>;
596 anatop-max-voltage = <3400000>;
597 anatop-enable-bit = <0>;
600 reg_arm: regulator-vddcore {
601 compatible = "fsl,anatop-regulator";
602 regulator-name = "cpu";
603 regulator-min-microvolt = <725000>;
604 regulator-max-microvolt = <1450000>;
605 regulator-always-on;
606 anatop-reg-offset = <0x140>;
607 anatop-vol-bit-shift = <0>;
608 anatop-vol-bit-width = <5>;
609 anatop-delay-reg-offset = <0x170>;
610 anatop-delay-bit-shift = <24>;
611 anatop-delay-bit-width = <2>;
612 anatop-min-bit-val = <1>;
613 anatop-min-voltage = <725000>;
614 anatop-max-voltage = <1450000>;
617 reg_soc: regulator-vddsoc {
618 compatible = "fsl,anatop-regulator";
619 regulator-name = "vddsoc";
620 regulator-min-microvolt = <725000>;
621 regulator-max-microvolt = <1450000>;
622 regulator-always-on;
623 anatop-reg-offset = <0x140>;
624 anatop-vol-bit-shift = <18>;
625 anatop-vol-bit-width = <5>;
626 anatop-delay-reg-offset = <0x170>;
627 anatop-delay-bit-shift = <28>;
628 anatop-delay-bit-width = <2>;
629 anatop-min-bit-val = <1>;
630 anatop-min-voltage = <725000>;
631 anatop-max-voltage = <1450000>;
635 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
636 interrupt-parent = <&gpc>;
639 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
640 nvmem-cell-names = "calib", "temp_grade";
646 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
650 phy-3p0-supply = <®_3p0>;
655 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
659 phy-3p0-supply = <®_3p0>;
664 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
667 snvs_rtc: snvs-rtc-lp {
668 compatible = "fsl,sec-v4.0-mon-rtc-lp";
675 snvs_poweroff: snvs-poweroff {
676 compatible = "syscon-poweroff";
684 snvs_pwrkey: snvs-powerkey {
685 compatible = "fsl,sec-v4.0-pwrkey";
689 wakeup-source;
693 snvs_lpgpr: snvs-lpgpr {
694 compatible = "fsl,imx6ul-snvs-lpgpr";
708 src: reset-controller@20d8000 {
709 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
713 #reset-cells = <1>;
717 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
719 interrupt-controller;
720 #interrupt-cells = <3>;
722 interrupt-parent = <&intc>;
726 compatible = "fsl,imx6ul-iomuxc";
730 gpr: iomuxc-gpr@20e4000 {
731 compatible = "fsl,imx6ul-iomuxc-gpr",
732 "fsl,imx6q-iomuxc-gpr", "syscon";
737 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
742 clock-names = "ipg", "per";
747 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
748 "fsl,imx35-sdma";
753 clock-names = "ipg", "ahb";
754 #dma-cells = <3>;
755 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
759 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
764 clock-names = "ipg", "per";
765 #pwm-cells = <3>;
770 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
775 clock-names = "ipg", "per";
776 #pwm-cells = <3>;
781 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
786 clock-names = "ipg", "per";
787 #pwm-cells = <3>;
792 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
797 clock-names = "ipg", "per";
798 #pwm-cells = <3>;
804 compatible = "fsl,aips-bus", "simple-bus";
805 #address-cells = <1>;
806 #size-cells = <1>;
811 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
812 #address-cells = <1>;
813 #size-cells = <1>;
819 clock-names = "ipg", "aclk", "mem";
822 compatible = "fsl,sec-v4.0-job-ring";
828 compatible = "fsl,sec-v4.0-job-ring";
834 compatible = "fsl,sec-v4.0-job-ring";
841 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
848 ahb-burst-config = <0x0>;
849 tx-burst-size-dword = <0x10>;
850 rx-burst-size-dword = <0x10>;
855 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
861 ahb-burst-config = <0x0>;
862 tx-burst-size-dword = <0x10>;
863 rx-burst-size-dword = <0x10>;
868 #index-cells = <1>;
869 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
874 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
876 interrupt-names = "int0", "pps";
884 clock-names = "ipg", "ahb", "ptp",
886 fsl,num-tx-queues = <1>;
887 fsl,num-rx-queues = <1>;
888 fsl,stop-mode = <&gpr 0x10 3>;
889 fsl,magic-packet;
894 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
900 clock-names = "ipg", "ahb", "per";
901 fsl,tuning-step = <2>;
902 fsl,tuning-start-tap = <20>;
903 bus-width = <4>;
908 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
914 clock-names = "ipg", "ahb", "per";
915 bus-width = <4>;
916 fsl,tuning-step = <2>;
917 fsl,tuning-start-tap = <20>;
922 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
926 num-channels = <2>;
927 clock-names = "adc";
928 fsl,adck-max-frequency = <30000000>, <40000000>,
934 #address-cells = <1>;
935 #size-cells = <0>;
936 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
944 #address-cells = <1>;
945 #size-cells = <0>;
946 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
954 #address-cells = <1>;
955 #size-cells = <0>;
956 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
963 memory-controller@21b0000 {
964 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
970 #address-cells = <2>;
971 #size-cells = <1>;
972 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
976 fsl,weim-cs-gpr = <&gpr>;
981 #address-cells = <1>;
982 #size-cells = <1>;
983 compatible = "fsl,imx6ul-ocotp", "syscon";
991 tempmon_temp_grade: temp-grade@20 {
995 cpu_speed_grade: speed-grade@10 {
1001 compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
1005 clock-names = "mclk";
1010 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
1016 clock-names = "pix", "axi", "disp_axi";
1021 compatible = "fsl,imx6ul-pxp";
1025 clock-names = "axi";
1029 #address-cells = <1>;
1030 #size-cells = <0>;
1031 compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
1033 reg-names = "QuadSPI", "QuadSPI-memory";
1037 clock-names = "qspi_en", "qspi";
1042 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1050 compatible = "fsl,imx6ul-uart",
1051 "fsl,imx6q-uart";
1056 clock-names = "ipg", "per";
1061 compatible = "fsl,imx6ul-uart",
1062 "fsl,imx6q-uart";
1067 clock-names = "ipg", "per";
1072 compatible = "fsl,imx6ul-uart",
1073 "fsl,imx6q-uart";
1078 clock-names = "ipg", "per";
1083 compatible = "fsl,imx6ul-uart",
1084 "fsl,imx6q-uart";
1089 clock-names = "ipg", "per";
1094 #address-cells = <1>;
1095 #size-cells = <0>;
1096 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1104 compatible = "fsl,imx6ul-uart",
1105 "fsl,imx6q-uart";
1110 clock-names = "ipg", "per";