Lines Matching +full:0 +full:x021b0000
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
84 #clock-cells = <0>;
91 #clock-cells = <0>;
98 #clock-cells = <0>;
99 clock-frequency = <0>;
105 #clock-cells = <0>;
106 clock-frequency = <0>;
119 reg = <0x00900000 0x20000>;
126 reg = <0x00a01000 0x1000>,
127 <0x00a00100 0x100>;
133 reg = <0x00a02000 0x1000>;
145 reg = <0x02000000 0x100000>;
152 reg = <0x02000000 0x40000>;
157 reg = <0x02004000 0x4000>;
159 dmas = <&sdma 14 18 0>, <&sdma 15 18 0>;
181 reg = <0x02008000 0x4000>;
193 reg = <0x0200c000 0x4000>;
205 reg = <0x02010000 0x4000>;
217 reg = <0x02014000 0x4000>;
230 reg = <0x02018000 0x4000>;
232 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
243 reg = <0x02020000 0x4000>;
245 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
256 reg = <0x02024000 0x4000>;
258 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
268 reg = <0x02028000 0x4000>;
270 dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
281 reg = <0x0202c000 0x4000>;
283 dmas = <&sdma 41 22 0>, <&sdma 42 22 0>;
294 reg = <0x02030000 0x4000>;
296 dmas = <&sdma 45 22 0>, <&sdma 46 22 0>;
308 reg = <0x02034000 0x4000>;
310 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
321 reg = <0x02080000 0x4000>;
331 reg = <0x02084000 0x4000>;
341 reg = <0x02088000 0x4000>;
351 reg = <0x0208c000 0x4000>;
361 reg = <0x02098000 0x4000>;
370 reg = <0x0209c000 0x4000>;
378 gpio-ranges = <&iomuxc 0 94 7>, <&iomuxc 7 25 25>;
383 reg = <0x020a0000 0x4000>;
391 gpio-ranges = <&iomuxc 0 50 32>;
396 reg = <0x020a4000 0x4000>;
404 gpio-ranges = <&iomuxc 0 82 12>, <&iomuxc 12 103 4>,
411 reg = <0x020a8000 0x4000>;
419 gpio-ranges = <&iomuxc 0 17 8>, <&iomuxc 8 107 8>,
432 reg = <0x020ac000 0x4000>;
440 gpio-ranges = <&iomuxc 0 135 1>, <&iomuxc 1 128 1>,
455 reg = <0x020b0000 0x4000>;
467 reg = <0x020b8000 0x4000>;
475 reg = <0x020bc000 0x4000>;
482 reg = <0x020c0000 0x4000>;
490 reg = <0x020c4000 0x4000>;
505 reg = <0x020c8000 0x4000>;
510 #size-cells = <0>;
514 reg = <0x20c8120>;
518 anatop-reg-offset = <0x120>;
521 anatop-min-bit-val = <0>;
524 anatop-enable-bit = <0>;
541 reg = <0x020c9000 0x1000>;
551 reg = <0x020ca000 0x1000>;
559 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
560 reg = <0x020cc000 0x4000>;
563 compatible = "fsl,sec-v4.0-mon-rtc-lp";
565 offset = <0x34>;
573 offset = <0x38>;
574 mask = <0x61>;
579 compatible = "fsl,sec-v4.0-pwrkey";
590 reg = <0x020d8000 0x4000>;
598 reg = <0x020dc000 0x4000>;
607 reg = <0x020e0000 0x4000>;
613 reg = <0x020e4000 0x4000>;
618 reg = <0x020e8000 0x4000>;
629 reg = <0x020ec000 0x4000>;
641 reg = <0x20f0000 0x4000>;
650 reg = <0x020f8000 0x4000>;
661 reg = <0x020fc000 0x4000>;
674 reg = <0x02100000 0x100000>;
680 reg = <0x02184000 0x200>;
684 fsl,usbmisc = <&usbmisc 0>;
686 ahb-burst-config = <0x0>;
687 tx-burst-size-dword = <0x10>;
688 rx-burst-size-dword = <0x10>;
695 reg = <0x02184200 0x200>;
700 ahb-burst-config = <0x0>;
701 tx-burst-size-dword = <0x10>;
702 rx-burst-size-dword = <0x10>;
710 reg = <0x02184800 0x200>;
715 reg = <0x02190000 0x4000>;
729 reg = <0x02194000 0x4000>;
743 reg = <0x02198000 0x4000>;
757 #size-cells = <0>;
759 reg = <0x021a0000 0x4000>;
767 #size-cells = <0>;
769 reg = <0x021a4000 0x4000>;
777 #size-cells = <0>;
779 reg = <0x021a8000 0x4000>;
787 reg = <0x021b0000 0x4000>;
793 reg = <0x021b4000 0x4000>;
802 reg = <0x021bc000 0x4000>;
806 reg = <0x10 4>;
810 reg = <0x38 4>;
814 reg = <0x20 4>;
820 reg = <0x021d8000 0x4000>;
827 reg = <0x021f4000 0x4000>;
829 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;