Lines Matching +full:0 +full:x021b0000
51 #size-cells = <0>;
53 cpu@0 {
56 reg = <0x0>;
88 #clock-cells = <0>;
94 #clock-cells = <0>;
102 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
107 #phy-cells = <0>;
119 reg = <0x00900000 0x20000>;
127 reg = <0x00a01000 0x1000>,
128 <0x00a00100 0x100>;
134 reg = <0x00a02000 0x1000>;
135 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
146 reg = <0x02000000 0x100000>;
153 reg = <0x02000000 0x40000>;
159 reg = <0x02004000 0x4000>;
160 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
161 dmas = <&sdma 14 18 0>,
162 <&sdma 15 18 0>;
179 #size-cells = <0>;
181 reg = <0x02008000 0x4000>;
182 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
191 #size-cells = <0>;
193 reg = <0x0200c000 0x4000>;
194 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
203 #size-cells = <0>;
205 reg = <0x02010000 0x4000>;
206 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
215 #size-cells = <0>;
217 reg = <0x02014000 0x4000>;
218 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
228 reg = <0x02018000 0x4000>;
229 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
233 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
241 reg = <0x02020000 0x4000>;
242 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
246 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
254 reg = <0x02024000 0x4000>;
255 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
259 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
265 #sound-dai-cells = <0>;
268 reg = <0x02028000 0x4000>;
269 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
273 dmas = <&sdma 37 1 0>,
274 <&sdma 38 1 0>;
281 #sound-dai-cells = <0>;
284 reg = <0x0202c000 0x4000>;
285 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
289 dmas = <&sdma 41 1 0>,
290 <&sdma 42 1 0>;
297 #sound-dai-cells = <0>;
300 reg = <0x02030000 0x4000>;
301 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
305 dmas = <&sdma 45 1 0>,
306 <&sdma 46 1 0>;
315 reg = <0x02034000 0x4000>;
316 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
320 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
328 reg = <0x02038000 0x4000>;
329 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
333 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
342 reg = <0x02080000 0x4000>;
343 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
352 reg = <0x02084000 0x4000>;
353 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
362 reg = <0x02088000 0x4000>;
363 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
372 reg = <0x0208c000 0x4000>;
373 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
381 reg = <0x02098000 0x4000>;
382 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
390 reg = <0x0209c000 0x4000>;
391 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
392 <0 67 IRQ_TYPE_LEVEL_HIGH>;
397 gpio-ranges = <&iomuxc 0 22 1>, <&iomuxc 1 20 2>,
407 reg = <0x020a0000 0x4000>;
408 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
409 <0 69 IRQ_TYPE_LEVEL_HIGH>;
414 gpio-ranges = <&iomuxc 0 53 3>, <&iomuxc 3 72 2>,
425 reg = <0x020a4000 0x4000>;
426 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
427 <0 71 IRQ_TYPE_LEVEL_HIGH>;
432 gpio-ranges = <&iomuxc 0 112 8>, <&iomuxc 8 121 4>,
444 reg = <0x020a8000 0x4000>;
445 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
446 <0 73 IRQ_TYPE_LEVEL_HIGH>;
451 gpio-ranges = <&iomuxc 0 95 1>, <&iomuxc 1 103 1>,
470 reg = <0x020ac000 0x4000>;
471 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
472 <0 75 IRQ_TYPE_LEVEL_HIGH>;
477 gpio-ranges = <&iomuxc 0 158 1>, <&iomuxc 1 151 1>,
492 reg = <0x020b8000 0x4000>;
493 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
500 reg = <0x020bc000 0x4000>;
501 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
507 reg = <0x020c0000 0x4000>;
508 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
515 reg = <0x020c4000 0x4000>;
516 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
517 <0 88 IRQ_TYPE_LEVEL_HIGH>;
525 reg = <0x020c8000 0x1000>;
526 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
527 <0 54 IRQ_TYPE_LEVEL_HIGH>,
528 <0 127 IRQ_TYPE_LEVEL_HIGH>;
536 anatop-reg-offset = <0x110>;
542 anatop-enable-bit = <0>;
551 anatop-reg-offset = <0x120>;
554 anatop-min-bit-val = <0>;
557 anatop-enable-bit = <0>;
566 anatop-reg-offset = <0x130>;
569 anatop-min-bit-val = <0>;
572 anatop-enable-bit = <0>;
581 anatop-reg-offset = <0x140>;
582 anatop-vol-bit-shift = <0>;
584 anatop-delay-reg-offset = <0x170>;
597 anatop-reg-offset = <0x140>;
600 anatop-delay-reg-offset = <0x170>;
614 anatop-reg-offset = <0x140>;
617 anatop-delay-reg-offset = <0x170>;
627 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
638 reg = <0x020c9000 0x1000>;
639 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
646 reg = <0x020ca000 0x1000>;
647 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
653 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
654 reg = <0x020cc000 0x4000>;
657 compatible = "fsl,sec-v4.0-mon-rtc-lp";
659 offset = <0x34>;
660 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
661 <0 20 IRQ_TYPE_LEVEL_HIGH>;
667 offset = <0x38>;
668 value = <0x60>;
669 mask = <0x60>;
675 reg = <0x020d0000 0x4000>;
676 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
680 reg = <0x020d4000 0x4000>;
681 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
686 reg = <0x020d8000 0x4000>;
687 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
688 <0 96 IRQ_TYPE_LEVEL_HIGH>;
694 reg = <0x020dc000 0x4000>;
697 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
704 #size-cells = <0>;
706 power-domain@0 {
707 reg = <0>;
708 #power-domain-cells = <0>;
713 #power-domain-cells = <0>;
721 #power-domain-cells = <0>;
734 reg = <0x020e0000 0x38>;
739 reg = <0x020e0000 0x4000>;
743 reg = <0x020e4000 0x4000>;
744 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
748 reg = <0x020e8000 0x4000>;
749 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
754 reg = <0x020ec000 0x4000>;
755 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
765 reg = <0x020f0000 0x4000>;
766 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
770 reg = <0x020f4000 0x4000>;
771 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
776 reg = <0x020f8000 0x4000>;
777 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
788 reg = <0x020fc000 0x4000>;
789 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
790 <0 100 IRQ_TYPE_LEVEL_HIGH>,
791 <0 101 IRQ_TYPE_LEVEL_HIGH>;
799 reg = <0x02100000 0x100000>;
804 reg = <0x02184000 0x200>;
805 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
808 fsl,usbmisc = <&usbmisc 0>;
809 ahb-burst-config = <0x0>;
810 tx-burst-size-dword = <0x10>;
811 rx-burst-size-dword = <0x10>;
817 reg = <0x02184200 0x200>;
818 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
822 ahb-burst-config = <0x0>;
823 tx-burst-size-dword = <0x10>;
824 rx-burst-size-dword = <0x10>;
830 reg = <0x02184400 0x200>;
831 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
837 ahb-burst-config = <0x0>;
838 tx-burst-size-dword = <0x10>;
839 rx-burst-size-dword = <0x10>;
846 reg = <0x02184800 0x200>;
852 reg = <0x02188000 0x4000>;
853 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
862 reg = <0x02190000 0x4000>;
863 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
874 reg = <0x02194000 0x4000>;
875 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
886 reg = <0x02198000 0x4000>;
887 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
898 reg = <0x0219c000 0x4000>;
899 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
910 #size-cells = <0>;
912 reg = <0x021a0000 0x4000>;
913 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
920 #size-cells = <0>;
922 reg = <0x021a4000 0x4000>;
923 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
930 #size-cells = <0>;
932 reg = <0x021a8000 0x4000>;
933 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
940 reg = <0x021b0000 0x4000>;
946 reg = <0x021b4000 0x4000>;
947 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
954 reg = <0x021b8000 0x4000>;
955 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
962 reg = <0x021bc000 0x4000>;
968 reg = <0x10 4>;
972 reg = <0x38 4>;
976 reg = <0x20 4>;
982 reg = <0x021d8000 0x4000>;
989 reg = <0x02200000 0x4000>;
990 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
999 reg = <0x02204000 0x4000>;
1000 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;