Lines Matching +full:reset +full:- +full:delay +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <25000000>;
41 clock_mcp251xfd: clock-mcp251xfd {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <20000000>;
47 clock_sja1105: clock-sja1105 {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <25000000>;
54 compatible = "virtual,mdio-gpio";
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_mdio>;
58 #address-cells = <1>;
59 #size-cells = <0>;
64 usbeth_phy: ethernet-phy@3 {
67 interrupts-extended = <&gpio5 12 IRQ_TYPE_LEVEL_LOW>;
68 reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
69 reset-assert-us = <500>;
70 reset-deassert-us = <1000>;
72 clock-names = "rmii-ref";
73 micrel,led-mode = <0>;
76 tja1102_phy0: ethernet-phy@4 {
79 interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>;
80 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
81 reset-assert-us = <20>;
82 reset-deassert-us = <2000>;
83 #address-cells = <1>;
84 #size-cells = <0>;
86 tja1102_phy1: ethernet-phy@5 {
89 interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>;
94 reg_5v0: regulator-5v0 {
95 compatible = "regulator-fixed";
96 regulator-name = "5v0";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
101 reg_otg_vbus: regulator-otg-vbus {
102 compatible = "regulator-fixed";
103 regulator-name = "otg-vbus";
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5000000>;
107 enable-active-high;
110 usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
111 compatible = "mmc-pwrseq-simple";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_wifi_npd>;
114 reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_can1>;
121 xceiver-supply = <®_5v0>;
126 cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_ecspi2>;
134 spi-max-frequency = <4000000>;
135 spi-rx-delay-us = <1>;
136 spi-tx-delay-us = <1>;
137 spi-cpha;
139 reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
144 #address-cells = <1>;
145 #size-cells = <0>;
150 phy-handle = <&usbeth_phy>;
151 phy-mode = "rmii";
157 phy-handle = <&tja1102_phy1>;
158 phy-mode = "rmii";
164 phy-handle = <&tja1102_phy0>;
165 phy-mode = "rmii";
172 phy-handle = <&rgmii_phy>;
173 phy-mode = "rgmii-id";
180 phy-mode = "rgmii-id";
182 fixed-link {
184 full-duplex;
192 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_ecspi3>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_can2>;
203 spi-max-frequency = <10000000>;
204 interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&pinctrl_enet>;
211 assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF>;
212 assigned-clock-rates = <125000000>;
215 phy-mode = "rgmii";
217 fixed-link {
219 full-duplex;
223 #address-cells = <1>;
224 #size-cells = <0>;
227 rgmii_phy: ethernet-phy@2 {
230 interrupts-extended = <&gpio1 28 IRQ_TYPE_EDGE_FALLING>;
231 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
232 reset-assert-us = <10000>;
233 reset-deassert-us = <1000>;
241 gpio-line-names =
249 gpio-line-names =
258 gpio-line-names =
266 gpio-line-names =
274 gpio-line-names =
285 gpio-line-names =
295 clock-frequency = <100000>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&pinctrl_i2c1>;
307 #address-cells = <1>;
308 #size-cells = <0>;
340 pinctrl-names = "default";
341 pinctrl-0 = <&pinctrl_uart4>;
346 vbus-supply = <®_otg_vbus>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&pinctrl_usbotg>;
351 disable-over-current;
364 pinctrl-names = "default";
365 pinctrl-0 = <&pinctrl_usdhc1>;
366 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
367 no-1-8-v;
368 disable-wp;
369 cap-sd-highspeed;
370 no-mmc;
371 no-sdio;
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_usdhc2>;
378 no-1-8-v;
379 non-removable;
380 mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
382 #address-cells = <1>;
383 #size-cells = <0>;
387 compatible = "brcm,bcm4329-fmac";
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_usdhc3>;
394 bus-width = <8>;
395 no-1-8-v;
396 non-removable;
397 no-sd;
398 no-sdio;
463 /* SJA1105Q switch reset */
466 /* phy3/rgmii_phy reset */
482 /* phy0/usbeth_phy reset */
487 /* phy12/tja1102_phy0 reset */
491 /* phy12/tja1102_phy0 enable. Set 100K pull-up */