Lines Matching +full:rng +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/input/input.h>
30 memory@10000000 { /* Appropriate memory size will be filled by U-Boot */
35 reg_3p3v: regulator-3P3V {
36 compatible = "regulator-fixed";
37 regulator-always-on;
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-name = "3P3V";
43 reg_eth_vio: regulator-eth-vio {
44 compatible = "regulator-fixed";
46 pinctrl-0 = <&pinctrl_enet_vio>;
47 pinctrl-names = "default";
48 regulator-always-on;
49 regulator-boot-on;
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52 regulator-name = "eth_vio";
53 vin-supply = <&sw2_reg>;
57 reg_latch_oe_on: regulator-latch-oe-on {
58 compatible = "regulator-fixed";
60 regulator-always-on;
61 regulator-name = "latch_oe_on";
64 reg_usb_h1_vbus: regulator-usb-h1-vbus {
65 compatible = "regulator-fixed";
66 enable-active-high;
68 regulator-min-microvolt = <5000000>;
69 regulator-max-microvolt = <5000000>;
70 regulator-name = "usb_h1_vbus";
73 reg_usb_otg_vbus: regulator-usb-otg-vbus {
74 compatible = "regulator-fixed";
75 regulator-min-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>;
77 regulator-name = "usb_otg_vbus";
82 pinctrl-0 = <&pinctrl_flexcan1>;
83 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_flexcan2>;
96 pinctrl-names = "default";
101 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
102 pinctrl-0 = <&pinctrl_ecspi1>;
103 pinctrl-names = "default";
107 #address-cells = <1>;
108 #size-cells = <1>;
109 compatible = "jedec,spi-nor";
110 m25p,fast-read;
112 spi-max-frequency = <50000000>;
117 cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
118 pinctrl-0 = <&pinctrl_ecspi2>;
119 pinctrl-names = "default";
124 phy-mode = "rmii";
125 phy-handle = <ðphy0>;
126 pinctrl-0 = <&pinctrl_enet_100M>;
127 pinctrl-names = "default";
131 #address-cells = <1>;
132 #size-cells = <0>;
134 ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
135 compatible = "ethernet-phy-ieee802.3-c22";
136 interrupt-parent = <&gpio4>;
138 pinctrl-0 = <&pinctrl_ethphy0>;
139 pinctrl-names = "default";
141 reset-assert-us = <1000>;
142 reset-deassert-us = <1000>;
143 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
144 smsc,disable-energy-detect; /* Make plugin detection reliable */
150 gpio-line-names =
151 "", "", "DHCOM-A", "", "DHCOM-B", "DHCOM-C", "", "",
153 "DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "", "",
158 gpio-line-names =
161 "SOM-HW2", "", "", "SOM-HW0", "", "SOM-MEM1", "SOM-MEM0", "",
166 gpio-line-names =
170 "", "", "", "DHCOM-G", "", "", "", "";
174 gpio-line-names =
175 "", "", "", "", "", "DHCOM-E", "DHCOM-INT", "DHCOM-H",
176 "DHCOM-I", "DHCOM-L", "", "", "", "", "", "",
177 "", "", "", "", "DHCOM-F", "", "", "",
182 gpio-line-names =
185 "", "", "DHCOM-V", "DHCOM-W", "", "DHCOM-O", "", "",
190 gpio-line-names =
191 "", "", "", "DHCOM-D", "", "", "SOM-HW1", "",
192 "", "", "", "", "", "", "DHCOM-J", "DHCOM-K",
198 gpio-line-names =
199 "DHCOM-M", "DHCOM-N", "", "", "", "", "", "",
200 "", "", "", "", "", "DHCOM-P", "", "",
212 clock-frequency = <100000>;
213 pinctrl-0 = <&pinctrl_i2c1>;
214 pinctrl-1 = <&pinctrl_i2c1_gpio>;
215 pinctrl-names = "default", "gpio";
216 scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
217 sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
223 clock-frequency = <100000>;
224 pinctrl-0 = <&pinctrl_i2c2>;
225 pinctrl-1 = <&pinctrl_i2c2_gpio>;
226 pinctrl-names = "default", "gpio";
227 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
228 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
234 clock-frequency = <100000>;
235 pinctrl-0 = <&pinctrl_i2c3>;
236 pinctrl-1 = <&pinctrl_i2c3_gpio>;
237 pinctrl-names = "default", "gpio";
238 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
239 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
244 interrupt-parent = <&gpio5>;
246 pinctrl-0 = <&pinctrl_pmic>;
247 pinctrl-names = "default";
252 lltc,fb-voltage-divider = <100000 110000>;
253 regulator-always-on;
254 regulator-boot-on;
255 regulator-max-microvolt = <1527272>;
256 regulator-min-microvolt = <787500>;
257 regulator-ramp-delay = <7000>;
258 regulator-suspend-mem-microvolt = <1040000>;
262 lltc,fb-voltage-divider = <100000 28000>;
263 regulator-always-on;
264 regulator-boot-on;
265 regulator-max-microvolt = <3657142>;
266 regulator-min-microvolt = <1885714>;
267 regulator-ramp-delay = <7000>;
271 lltc,fb-voltage-divider = <100000 110000>;
272 regulator-always-on;
273 regulator-boot-on;
274 regulator-max-microvolt = <1527272>;
275 regulator-min-microvolt = <787500>;
276 regulator-ramp-delay = <7000>;
277 regulator-suspend-mem-microvolt = <980000>;
281 lltc,fb-voltage-divider = <100000 93100>;
282 regulator-always-on;
283 regulator-boot-on;
284 regulator-max-microvolt = <1659291>;
285 regulator-min-microvolt = <855571>;
286 regulator-ramp-delay = <7000>;
290 lltc,fb-voltage-divider = <102000 29400>;
291 regulator-always-on;
292 regulator-boot-on;
293 regulator-max-microvolt = <3240306>;
294 regulator-min-microvolt = <3240306>;
298 lltc,fb-voltage-divider = <100000 41200>;
299 regulator-always-on;
300 regulator-boot-on;
301 regulator-max-microvolt = <2484708>;
302 regulator-min-microvolt = <2484708>;
309 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
310 pinctrl-0 = <&pinctrl_tsc2004>;
311 pinctrl-names = "default";
313 vio-supply = <®_3p3v>;
325 interrupt-parent = <&gpio7>;
327 pinctrl-0 = <&pinctrl_rtc>;
328 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_pcie>;
335 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_pwm1>;
340 pinctrl-names = "default";
344 vin-supply = <&sw3_reg>;
348 vin-supply = <&sw1_reg>;
352 vin-supply = <&sw1_reg>;
356 vin-supply = <&sw2_reg>;
360 vin-supply = <&sw2_reg>;
364 dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
365 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
366 dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
367 rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
368 pinctrl-0 = <&pinctrl_uart1>;
369 pinctrl-names = "default";
370 uart-has-rtscts;
375 pinctrl-0 = <&pinctrl_uart4>;
376 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_uart5>;
382 pinctrl-names = "default";
383 uart-has-rtscts;
389 pinctrl-0 = <&pinctrl_usbh1>;
390 pinctrl-names = "default";
391 vbus-supply = <®_usb_h1_vbus>;
396 disable-over-current;
398 pinctrl-0 = <&pinctrl_usbotg>;
399 pinctrl-names = "default";
400 vbus-supply = <®_usb_otg_vbus>;
405 cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
406 keep-power-in-suspend;
407 pinctrl-0 = <&pinctrl_usdhc2>;
408 pinctrl-names = "default";
413 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
414 fsl,wp-controller;
415 keep-power-in-suspend;
416 pinctrl-0 = <&pinctrl_usdhc3>;
417 pinctrl-names = "default";
422 bus-width = <8>;
423 keep-power-in-suspend;
424 no-1-8-v;
425 non-removable;
426 pinctrl-0 = <&pinctrl_usdhc4>;
427 pinctrl-names = "default";
432 #address-cells = <2>;
433 #size-cells = <1>;
434 fsl,weim-cs-gpr = <&gpr>;
435 pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
436 pinctrl-names = "default";
444 pinctrl-0 = <
455 pinctrl-names = "default";
457 pinctrl_hog_base: hog-base-grp {
459 /* GPIOs for memory coding */
462 /* GPIOs for hardware coding */
469 /* DHCOM GPIOs */
470 pinctrl_dhcom_a: dhcom-a-grp {
474 pinctrl_dhcom_b: dhcom-b-grp {
478 pinctrl_dhcom_c: dhcom-c-grp {
482 pinctrl_dhcom_d: dhcom-d-grp {
486 pinctrl_dhcom_e: dhcom-e-grp {
490 pinctrl_dhcom_f: dhcom-f-grp {
494 pinctrl_dhcom_g: dhcom-g-grp {
498 pinctrl_dhcom_h: dhcom-h-grp {
502 pinctrl_dhcom_i: dhcom-i-grp {
506 pinctrl_dhcom_j: dhcom-j-grp {
510 pinctrl_dhcom_k: dhcom-k-grp {
514 pinctrl_dhcom_l: dhcom-l-grp {
518 pinctrl_dhcom_m: dhcom-m-grp {
522 pinctrl_dhcom_n: dhcom-n-grp {
526 pinctrl_dhcom_o: dhcom-o-grp {
530 pinctrl_dhcom_p: dhcom-p-grp {
534 pinctrl_dhcom_q: dhcom-q-grp {
538 pinctrl_dhcom_r: dhcom-r-grp {
542 pinctrl_dhcom_s: dhcom-s-grp {
546 pinctrl_dhcom_t: dhcom-t-grp {
550 pinctrl_dhcom_u: dhcom-u-grp {
554 pinctrl_dhcom_v: dhcom-v-grp {
558 pinctrl_dhcom_w: dhcom-w-grp {
562 pinctrl_dhcom_int: dhcom-int-grp {
566 pinctrl_ecspi1: ecspi1-grp {
576 pinctrl_ecspi2: ecspi2-grp {
585 pinctrl_enet_100M: enet-100M-grp {
600 pinctrl_enet_vio: enet-vio-grp {
606 pinctrl_ethphy0: ethphy0-grp {
613 pinctrl_flexcan1: flexcan1-grp {
620 pinctrl_flexcan2: flexcan2-grp {
627 pinctrl_i2c1: i2c1-grp {
634 pinctrl_i2c1_gpio: i2c1-gpio-grp {
641 pinctrl_i2c2: i2c2-grp {
648 pinctrl_i2c2_gpio: i2c2-gpio-grp {
655 pinctrl_i2c3: i2c3-grp {
662 pinctrl_i2c3_gpio: i2c3-gpio-grp {
669 pinctrl_pcie: pcie-grp {
675 pinctrl_pmic: pmic-grp {
681 pinctrl_pwm1: pwm1-grp {
687 pinctrl_rtc: rtc-grp {
693 pinctrl_tsc2004: tsc2004-grp {
699 pinctrl_uart1: uart1-grp {
712 pinctrl_uart4: uart4-grp {
719 pinctrl_uart5: uart5-grp {
728 pinctrl_usbh1: usbh1-grp {
734 pinctrl_usbotg: usbotg-grp {
740 pinctrl_usdhc2: usdhc2-grp {
752 pinctrl_usdhc3: usdhc3-grp {
764 pinctrl_usdhc4: usdhc4-grp {
779 pinctrl_weim: weim-grp {
804 pinctrl_weim_cs0: weim-cs0-grp {
810 pinctrl_weim_cs1: weim-cs1-grp {