Lines Matching +full:0 +full:xb0000000
14 reg = <0x70000000 0x20000000>,
15 <0xb0000000 0x20000000>;
21 #size-cells = <0>;
23 reg_3p2v: regulator@0 {
25 reg = <0>;
45 pinctrl-0 = <&pinctrl_i2c2>;
51 reg = <0x41>;
52 id = <0>;
53 blocks = <0x5>;
54 interrupts = <6 0x0>;
56 irq-trigger = <0x1>;
62 st,ref-sel = <0>;
74 reg = <0x50>;
80 reg = <0x68>;
86 pinctrl-0 = <&pinctrl_hog>;
91 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
92 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
93 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
99 MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000
100 MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000
106 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
107 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
108 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
109 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
110 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
111 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
112 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
113 MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4
114 MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4
115 MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4
116 MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4
117 MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4
118 MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4
119 MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4
120 MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4
128 pinctrl-0 = <&pinctrl_nand>;