Lines Matching +full:0 +full:x1294
162 reg = <0x10d20000 0x1000>;
163 ranges = <0x0 0x10d20000 0x6000>;
168 reg = <0x4000 0x1000>;
173 reg = <0x5000 0x1000>;
179 reg = <0x10010000 0x30000>;
185 reg = <0x03810000 0x0C>;
195 reg = <0x11000000 0x10000>;
208 #size-cells = <0>;
209 reg = <0x12200000 0x2000>;
212 fifo-depth = <0x40>;
220 #size-cells = <0>;
221 reg = <0x12210000 0x2000>;
224 fifo-depth = <0x40>;
232 #size-cells = <0>;
233 reg = <0x12220000 0x1000>;
236 fifo-depth = <0x40>;
242 reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
265 reg = <0x10CA1000 0x200>;
271 reg = <0x10CA1400 0x200>;
277 reg = <0x10CA1800 0x200>;
283 reg = <0x10CA1C00 0x200>;
289 reg = <0x11A51000 0x200>;
295 reg = <0x11A51400 0x200>;
301 reg = <0x10d00000 0x2000>;
313 reg = <0x10d10000 0x2000>;
325 reg = <0x10d60000 0x2000>;
337 reg = <0x10d70000 0x2000>;
349 reg = <0x10044000 0x20>;
350 #power-domain-cells = <0>;
356 reg = <0x10044020 0x20>;
357 #power-domain-cells = <0>;
363 reg = <0x10044060 0x20>;
364 #power-domain-cells = <0>;
370 reg = <0x10044080 0x20>;
371 #power-domain-cells = <0>;
377 reg = <0x100440C0 0x20>;
378 #power-domain-cells = <0>;
384 reg = <0x100440E0 0x20>;
385 #power-domain-cells = <0>;
391 reg = <0x10044120 0x20>;
392 #power-domain-cells = <0>;
398 reg = <0x13400000 0x1000>;
410 reg = <0x13410000 0x1000>;
416 reg = <0x14000000 0x1000>;
422 reg = <0x14010000 0x1000>;
428 reg = <0x03860000 0x1000>;
435 reg = <0x03880000 0x1000>;
447 reg = <0x121A0000 0x1000>;
458 reg = <0x121B0000 0x1000>;
469 reg = <0x10800000 0x1000>;
480 reg = <0x11C10000 0x1000>;
499 reg = <0x03830000 0x100>;
500 dmas = <&adma 0>,
511 samsung,idma-addr = <0x03000000>;
513 pinctrl-0 = <&i2s0_bus>;
520 reg = <0x12D60000 0x100>;
530 pinctrl-0 = <&i2s1_bus>;
536 reg = <0x12D70000 0x100>;
546 pinctrl-0 = <&i2s2_bus>;
552 reg = <0x12d20000 0x100>;
558 #size-cells = <0>;
560 pinctrl-0 = <&spi0_bus>;
568 reg = <0x12d30000 0x100>;
574 #size-cells = <0>;
576 pinctrl-0 = <&spi1_bus>;
584 reg = <0x12d40000 0x100>;
590 #size-cells = <0>;
592 pinctrl-0 = <&spi2_bus>;
601 #phy-cells = <0>;
612 reg = <0x14500000 0x10000>;
619 #size-cells = <0>;
625 reg = <0x12E00000 0x1000>;
628 #size-cells = <0>;
630 pinctrl-0 = <&i2c8_hs_bus>;
638 reg = <0x12E10000 0x1000>;
641 #size-cells = <0>;
643 pinctrl-0 = <&i2c9_hs_bus>;
651 reg = <0x12E20000 0x1000>;
654 #size-cells = <0>;
656 pinctrl-0 = <&i2c10_hs_bus>;
664 reg = <0x14530000 0x70000>;
675 #sound-dai-cells = <0>;
679 reg = <0x145D0000 0x20>;
684 reg = <0x101B0000 0x200>;
691 pinctrl-0 = <&hdmi_cec>;
697 reg = <0x14450000 0x10000>;
709 reg = <0x11C00000 0x64>;
718 reg = <0x13e00000 0x1000>;
728 reg = <0x13e10000 0x1000>;
738 reg = <0x11800000 0x5000>;
788 reg = <0x12800000 0x1294>;
789 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x12810000 0x1294>;
799 interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
808 reg = <0x12820000 0x1294>;
809 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>;
818 reg = <0x11F50000 0x1000>;
827 reg = <0x11F60000 0x1000>;
836 reg = <0x10040000 0x5000>;
847 reg = <0x10060000 0x100>;
851 #thermal-sensor-cells = <0>;
856 reg = <0x10064000 0x100>;
860 #thermal-sensor-cells = <0>;
865 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
869 #thermal-sensor-cells = <0>;
874 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
878 #thermal-sensor-cells = <0>;
883 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
887 #thermal-sensor-cells = <0>;
892 reg = <0x10A60000 0x1000>;
897 #iommu-cells = <0>;
902 reg = <0x10A70000 0x1000>;
907 #iommu-cells = <0>;
912 reg = <0x14650000 0x1000>;
918 #iommu-cells = <0>;
923 reg = <0x13E80000 0x1000>;
925 interrupts = <2 0>;
929 #iommu-cells = <0>;
934 reg = <0x13E90000 0x1000>;
940 #iommu-cells = <0>;
945 reg = <0x12880000 0x1000>;
951 #iommu-cells = <0>;
956 reg = <0x12890000 0x1000>;
961 #iommu-cells = <0>;
966 reg = <0x128A0000 0x1000>;
971 #iommu-cells = <0>;
976 reg = <0x128C0000 0x1000>;
982 #iommu-cells = <0>;
987 reg = <0x128D0000 0x1000>;
993 #iommu-cells = <0>;
998 reg = <0x128E0000 0x1000>;
1004 #iommu-cells = <0>;
1009 reg = <0x11D40000 0x1000>;
1011 interrupts = <4 0>;
1014 #iommu-cells = <0>;
1019 reg = <0x11F10000 0x1000>;
1024 #iommu-cells = <0>;
1029 reg = <0x11F20000 0x1000>;
1033 #iommu-cells = <0>;
1038 reg = <0x11200000 0x1000>;
1044 #iommu-cells = <0>;
1049 reg = <0x11210000 0x1000>;
1055 #iommu-cells = <0>;
1060 reg = <0x14640000 0x1000>;
1066 #iommu-cells = <0>;
1071 reg = <0x14680000 0x1000>;
1073 interrupts = <3 0>;
1077 #iommu-cells = <0>;
1251 pinctrl-0 = <&i2c0_bus>;
1258 pinctrl-0 = <&i2c1_bus>;
1265 pinctrl-0 = <&i2c2_bus>;
1272 pinctrl-0 = <&i2c3_bus>;
1279 pinctrl-0 = <&i2c4_hs_bus>;
1286 pinctrl-0 = <&i2c5_hs_bus>;
1293 pinctrl-0 = <&i2c6_hs_bus>;
1300 pinctrl-0 = <&i2c7_hs_bus>;