Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a15";
67 reg = <0>;
69 clock-names = "cpu";
70 operating-points-v2 = <&cpu0_opp_table>;
71 #cooling-cells = <2>; /* min followed by max */
75 compatible = "arm,cortex-a15";
76 reg = <1>;
78 clock-names = "cpu";
79 operating-points-v2 = <&cpu0_opp_table>;
80 #cooling-cells = <2>; /* min followed by max */
84 cpu0_opp_table: opp-table0 {
85 compatible = "operating-points-v2";
86 opp-shared;
88 opp-200000000 {
89 opp-hz = /bits/ 64 <200000000>;
90 opp-microvolt = <925000>;
91 clock-latency-ns = <140000>;
93 opp-300000000 {
94 opp-hz = /bits/ 64 <300000000>;
95 opp-microvolt = <937500>;
96 clock-latency-ns = <140000>;
98 opp-400000000 {
99 opp-hz = /bits/ 64 <400000000>;
100 opp-microvolt = <950000>;
101 clock-latency-ns = <140000>;
103 opp-500000000 {
104 opp-hz = /bits/ 64 <500000000>;
105 opp-microvolt = <975000>;
106 clock-latency-ns = <140000>;
108 opp-600000000 {
109 opp-hz = /bits/ 64 <600000000>;
110 opp-microvolt = <1000000>;
111 clock-latency-ns = <140000>;
113 opp-700000000 {
114 opp-hz = /bits/ 64 <700000000>;
115 opp-microvolt = <1012500>;
116 clock-latency-ns = <140000>;
118 opp-800000000 {
119 opp-hz = /bits/ 64 <800000000>;
120 opp-microvolt = <1025000>;
121 clock-latency-ns = <140000>;
123 opp-900000000 {
124 opp-hz = /bits/ 64 <900000000>;
125 opp-microvolt = <1050000>;
126 clock-latency-ns = <140000>;
128 opp-1000000000 {
129 opp-hz = /bits/ 64 <1000000000>;
130 opp-microvolt = <1075000>;
131 clock-latency-ns = <140000>;
132 opp-suspend;
134 opp-1100000000 {
135 opp-hz = /bits/ 64 <1100000000>;
136 opp-microvolt = <1100000>;
137 clock-latency-ns = <140000>;
139 opp-1200000000 {
140 opp-hz = /bits/ 64 <1200000000>;
141 opp-microvolt = <1125000>;
142 clock-latency-ns = <140000>;
144 opp-1300000000 {
145 opp-hz = /bits/ 64 <1300000000>;
146 opp-microvolt = <1150000>;
147 clock-latency-ns = <140000>;
149 opp-1400000000 {
150 opp-hz = /bits/ 64 <1400000000>;
151 opp-microvolt = <1200000>;
152 clock-latency-ns = <140000>;
154 opp-1500000000 {
155 opp-hz = /bits/ 64 <1500000000>;
156 opp-microvolt = <1225000>;
157 clock-latency-ns = <140000>;
159 opp-1600000000 {
160 opp-hz = /bits/ 64 <1600000000>;
161 opp-microvolt = <1250000>;
162 clock-latency-ns = <140000>;
164 opp-1700000000 {
165 opp-hz = /bits/ 64 <1700000000>;
166 opp-microvolt = <1300000>;
167 clock-latency-ns = <140000>;
172 compatible = "arm,cortex-a15-pmu";
173 interrupt-parent = <&combiner>;
179 compatible = "mmio-sram";
180 reg = <0x02020000 0x30000>;
181 #address-cells = <1>;
182 #size-cells = <1>;
185 smp-sram@0 {
186 compatible = "samsung,exynos4210-sysram";
187 reg = <0x0 0x1000>;
190 smp-sram@2f000 {
191 compatible = "samsung,exynos4210-sysram-ns";
192 reg = <0x2f000 0x1000>;
196 pd_gsc: power-domain@10044000 {
197 compatible = "samsung,exynos4210-pd";
198 reg = <0x10044000 0x20>;
199 #power-domain-cells = <0>;
203 pd_mfc: power-domain@10044040 {
204 compatible = "samsung,exynos4210-pd";
205 reg = <0x10044040 0x20>;
206 #power-domain-cells = <0>;
210 pd_g3d: power-domain@10044060 {
211 compatible = "samsung,exynos4210-pd";
212 reg = <0x10044060 0x20>;
213 #power-domain-cells = <0>;
217 pd_disp1: power-domain@100440a0 {
218 compatible = "samsung,exynos4210-pd";
219 reg = <0x100440A0 0x20>;
220 #power-domain-cells = <0>;
224 pd_mau: power-domain@100440c0 {
225 compatible = "samsung,exynos4210-pd";
226 reg = <0x100440C0 0x20>;
227 #power-domain-cells = <0>;
231 clock: clock-controller@10010000 {
232 compatible = "samsung,exynos5250-clock";
233 reg = <0x10010000 0x30000>;
234 #clock-cells = <1>;
237 clock_audss: audss-clock-controller@3810000 {
238 compatible = "samsung,exynos5250-audss-clock";
239 reg = <0x03810000 0x0C>;
240 #clock-cells = <1>;
243 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
244 power-domains = <&pd_mau>;
248 compatible = "samsung,exynos4210-mct";
249 reg = <0x101C0000 0x800>;
251 clock-names = "fin_pll", "mct";
252 interrupts-extended = <&combiner 23 3>,
261 compatible = "samsung,exynos5250-pinctrl";
262 reg = <0x11400000 0x1000>;
265 wakup_eint: wakeup-interrupt-controller {
266 compatible = "samsung,exynos4210-wakeup-eint";
267 interrupt-parent = <&gic>;
273 compatible = "samsung,exynos5250-pinctrl";
274 reg = <0x13400000 0x1000>;
279 compatible = "samsung,exynos5250-pinctrl";
280 reg = <0x10d10000 0x1000>;
285 compatible = "samsung,exynos5250-pinctrl";
286 reg = <0x03860000 0x1000>;
288 power-domains = <&pd_mau>;
291 pmu_system_controller: system-controller@10040000 {
292 compatible = "samsung,exynos5250-pmu", "syscon";
293 reg = <0x10040000 0x5000>;
294 clock-names = "clkout16";
296 #clock-cells = <1>;
297 interrupt-controller;
298 #interrupt-cells = <3>;
299 interrupt-parent = <&gic>;
303 compatible = "samsung,exynos5250-wdt";
304 reg = <0x101D0000 0x100>;
307 clock-names = "watchdog";
308 samsung,syscon-phandle = <&pmu_system_controller>;
312 compatible = "samsung,mfc-v6";
313 reg = <0x11000000 0x10000>;
315 power-domains = <&pd_mfc>;
317 clock-names = "mfc";
319 iommu-names = "left", "right";
323 compatible = "samsung,exynos5250-rotator";
324 reg = <0x11C00000 0x64>;
327 clock-names = "rotator";
332 compatible = "samsung,exynos5250-mali", "arm,mali-t604";
333 reg = <0x11800000 0x5000>;
337 interrupt-names = "job", "mmu", "gpu";
339 clock-names = "core";
340 operating-points-v2 = <&gpu_opp_table>;
341 power-domains = <&pd_g3d>;
344 gpu_opp_table: opp-table {
345 compatible = "operating-points-v2";
347 opp-100000000 {
348 opp-hz = /bits/ 64 <100000000>;
349 opp-microvolt = <925000>;
351 opp-160000000 {
352 opp-hz = /bits/ 64 <160000000>;
353 opp-microvolt = <925000>;
355 opp-266000000 {
356 opp-hz = /bits/ 64 <266000000>;
357 opp-microvolt = <1025000>;
359 opp-350000000 {
360 opp-hz = /bits/ 64 <350000000>;
361 opp-microvolt = <1075000>;
363 opp-400000000 {
364 opp-hz = /bits/ 64 <400000000>;
365 opp-microvolt = <1125000>;
367 opp-450000000 {
368 opp-hz = /bits/ 64 <450000000>;
369 opp-microvolt = <1150000>;
371 opp-533000000 {
372 opp-hz = /bits/ 64 <533000000>;
373 opp-microvolt = <1250000>;
379 compatible = "samsung,exynos5250-tmu";
380 reg = <0x10060000 0x100>;
383 clock-names = "tmu_apbif";
384 #thermal-sensor-cells = <0>;
388 compatible = "snps,dwc-ahci";
389 samsung,sata-freq = <66>;
390 reg = <0x122F0000 0x1ff>;
393 clock-names = "sata", "sclk_sata";
395 phy-names = "sata-phy";
396 ports-implemented = <0x1>;
400 sata_phy: sata-phy@12170000 {
401 compatible = "samsung,exynos5250-sata-phy";
402 reg = <0x12170000 0x1ff>;
404 clock-names = "sata_phyctrl";
405 #phy-cells = <0>;
406 samsung,syscon-phandle = <&pmu_system_controller>;
410 /* i2c_0-3 are defined in exynos5.dtsi */
412 compatible = "samsung,s3c2440-i2c";
413 reg = <0x12CA0000 0x100>;
415 #address-cells = <1>;
416 #size-cells = <0>;
418 clock-names = "i2c";
419 pinctrl-names = "default";
420 pinctrl-0 = <&i2c4_bus>;
425 compatible = "samsung,s3c2440-i2c";
426 reg = <0x12CB0000 0x100>;
428 #address-cells = <1>;
429 #size-cells = <0>;
431 clock-names = "i2c";
432 pinctrl-names = "default";
433 pinctrl-0 = <&i2c5_bus>;
438 compatible = "samsung,s3c2440-i2c";
439 reg = <0x12CC0000 0x100>;
441 #address-cells = <1>;
442 #size-cells = <0>;
444 clock-names = "i2c";
445 pinctrl-names = "default";
446 pinctrl-0 = <&i2c6_bus>;
451 compatible = "samsung,s3c2440-i2c";
452 reg = <0x12CD0000 0x100>;
454 #address-cells = <1>;
455 #size-cells = <0>;
457 clock-names = "i2c";
458 pinctrl-names = "default";
459 pinctrl-0 = <&i2c7_bus>;
464 compatible = "samsung,s3c2440-hdmiphy-i2c";
465 reg = <0x12CE0000 0x1000>;
467 #address-cells = <1>;
468 #size-cells = <0>;
470 clock-names = "i2c";
474 compatible = "samsung,exynos4212-hdmiphy";
475 reg = <0x38>;
480 compatible = "samsung,exynos5-sata-phy-i2c";
481 reg = <0x121D0000 0x100>;
482 #address-cells = <1>;
483 #size-cells = <0>;
485 clock-names = "i2c";
488 sata_phy_i2c: sata-phy-i2c@38 {
489 compatible = "samsung,exynos-sataphy-i2c";
490 reg = <0x38>;
496 compatible = "samsung,exynos4210-spi";
498 reg = <0x12d20000 0x100>;
502 dma-names = "tx", "rx";
503 #address-cells = <1>;
504 #size-cells = <0>;
506 clock-names = "spi", "spi_busclk0";
507 pinctrl-names = "default";
508 pinctrl-0 = <&spi0_bus>;
512 compatible = "samsung,exynos4210-spi";
514 reg = <0x12d30000 0x100>;
518 dma-names = "tx", "rx";
519 #address-cells = <1>;
520 #size-cells = <0>;
522 clock-names = "spi", "spi_busclk0";
523 pinctrl-names = "default";
524 pinctrl-0 = <&spi1_bus>;
528 compatible = "samsung,exynos4210-spi";
530 reg = <0x12d40000 0x100>;
534 dma-names = "tx", "rx";
535 #address-cells = <1>;
536 #size-cells = <0>;
538 clock-names = "spi", "spi_busclk0";
539 pinctrl-names = "default";
540 pinctrl-0 = <&spi2_bus>;
544 compatible = "samsung,exynos5250-dw-mshc";
546 #address-cells = <1>;
547 #size-cells = <0>;
548 reg = <0x12200000 0x1000>;
550 clock-names = "biu", "ciu";
551 fifo-depth = <0x80>;
556 compatible = "samsung,exynos5250-dw-mshc";
558 #address-cells = <1>;
559 #size-cells = <0>;
560 reg = <0x12210000 0x1000>;
562 clock-names = "biu", "ciu";
563 fifo-depth = <0x80>;
568 compatible = "samsung,exynos5250-dw-mshc";
570 #address-cells = <1>;
571 #size-cells = <0>;
572 reg = <0x12220000 0x1000>;
574 clock-names = "biu", "ciu";
575 fifo-depth = <0x80>;
580 compatible = "samsung,exynos5250-dw-mshc";
581 reg = <0x12230000 0x1000>;
583 #address-cells = <1>;
584 #size-cells = <0>;
586 clock-names = "biu", "ciu";
587 fifo-depth = <0x80>;
592 compatible = "samsung,s5pv210-i2s";
594 reg = <0x03830000 0x100>;
598 dma-names = "tx", "rx", "tx-sec";
602 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
603 samsung,idma-addr = <0x03000000>;
604 pinctrl-names = "default";
605 pinctrl-0 = <&i2s0_bus>;
606 power-domains = <&pd_mau>;
607 #clock-cells = <1>;
608 #sound-dai-cells = <1>;
612 compatible = "samsung,s3c6410-i2s";
614 reg = <0x12D60000 0x100>;
617 dma-names = "tx", "rx";
619 clock-names = "iis", "i2s_opclk0";
620 pinctrl-names = "default";
621 pinctrl-0 = <&i2s1_bus>;
622 power-domains = <&pd_mau>;
623 #sound-dai-cells = <1>;
627 compatible = "samsung,s3c6410-i2s";
629 reg = <0x12D70000 0x100>;
632 dma-names = "tx", "rx";
634 clock-names = "iis", "i2s_opclk0";
635 pinctrl-names = "default";
636 pinctrl-0 = <&i2s2_bus>;
637 power-domains = <&pd_mau>;
638 #sound-dai-cells = <1>;
642 compatible = "samsung,exynos5250-dwusb3";
644 clock-names = "usbdrd30";
645 #address-cells = <1>;
646 #size-cells = <1>;
651 reg = <0x12000000 0x10000>;
654 phy-names = "usb2-phy", "usb3-phy";
659 compatible = "samsung,exynos5250-usbdrd-phy";
660 reg = <0x12100000 0x100>;
662 clock-names = "phy", "ref";
663 samsung,pmu-syscon = <&pmu_system_controller>;
664 #phy-cells = <1>;
668 compatible = "samsung,exynos4210-ehci";
669 reg = <0x12110000 0x100>;
673 clock-names = "usbhost";
675 phy-names = "host";
679 compatible = "samsung,exynos4210-ohci";
680 reg = <0x12120000 0x100>;
684 clock-names = "usbhost";
686 phy-names = "host";
690 compatible = "samsung,exynos5250-usb2-phy";
691 reg = <0x12130000 0x100>;
693 clock-names = "phy", "ref";
694 #phy-cells = <1>;
695 samsung,sysreg-phandle = <&sysreg_system_controller>;
696 samsung,pmureg-phandle = <&pmu_system_controller>;
701 reg = <0x121A0000 0x1000>;
704 clock-names = "apb_pclk";
705 #dma-cells = <1>;
706 #dma-channels = <8>;
707 #dma-requests = <32>;
712 reg = <0x121B0000 0x1000>;
715 clock-names = "apb_pclk";
716 #dma-cells = <1>;
717 #dma-channels = <8>;
718 #dma-requests = <32>;
723 reg = <0x10800000 0x1000>;
726 clock-names = "apb_pclk";
727 #dma-cells = <1>;
728 #dma-channels = <8>;
729 #dma-requests = <1>;
734 reg = <0x11C10000 0x1000>;
737 clock-names = "apb_pclk";
738 #dma-cells = <1>;
739 #dma-channels = <8>;
740 #dma-requests = <1>;
744 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
745 reg = <0x13e00000 0x1000>;
747 power-domains = <&pd_gsc>;
749 clock-names = "gscl";
754 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
755 reg = <0x13e10000 0x1000>;
757 power-domains = <&pd_gsc>;
759 clock-names = "gscl";
764 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
765 reg = <0x13e20000 0x1000>;
767 power-domains = <&pd_gsc>;
769 clock-names = "gscl";
774 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
775 reg = <0x13e30000 0x1000>;
777 power-domains = <&pd_gsc>;
779 clock-names = "gscl";
784 compatible = "samsung,exynos4212-hdmi";
785 reg = <0x14530000 0x70000>;
786 power-domains = <&pd_disp1>;
791 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
793 samsung,syscon-phandle = <&pmu_system_controller>;
795 #sound-dai-cells = <0>;
800 compatible = "samsung,s5p-cec";
801 reg = <0x101B0000 0x200>;
804 clock-names = "hdmicec";
805 samsung,syscon-phandle = <&pmu_system_controller>;
806 hdmi-phandle = <&hdmi>;
807 pinctrl-names = "default";
808 pinctrl-0 = <&hdmi_cec>;
813 compatible = "samsung,exynos5250-mixer";
814 reg = <0x14450000 0x10000>;
815 power-domains = <&pd_disp1>;
819 clock-names = "mixer", "hdmi", "sclk_hdmi";
824 dp_phy: video-phy {
825 compatible = "samsung,exynos5250-dp-video-phy";
826 samsung,pmu-syscon = <&pmu_system_controller>;
827 #phy-cells = <0>;
830 mipi_phy: video-phy@10040710 {
831 compatible = "samsung,s5pv210-mipi-video-phy";
832 reg = <0x10040710 0x100>;
833 #phy-cells = <1>;
838 compatible = "samsung,exynos4210-mipi-dsi";
839 reg = <0x14500000 0x10000>;
841 samsung,power-domain = <&pd_disp1>;
843 phy-names = "dsim";
845 clock-names = "bus_clk", "sclk_mipi";
847 #address-cells = <1>;
848 #size-cells = <0>;
852 compatible = "samsung,exynos-adc-v1";
853 reg = <0x12D10000 0x100>;
856 clock-names = "adc";
857 #io-channel-cells = <1>;
858 samsung,syscon-phandle = <&pmu_system_controller>;
863 compatible = "samsung,exynos-sysmmu";
864 reg = <0x10A60000 0x1000>;
865 interrupt-parent = <&combiner>;
867 clock-names = "sysmmu", "master";
869 #iommu-cells = <0>;
873 compatible = "samsung,exynos-sysmmu";
874 reg = <0x11200000 0x1000>;
875 interrupt-parent = <&combiner>;
877 power-domains = <&pd_mfc>;
878 clock-names = "sysmmu", "master";
880 #iommu-cells = <0>;
884 compatible = "samsung,exynos-sysmmu";
885 reg = <0x11210000 0x1000>;
886 interrupt-parent = <&combiner>;
888 power-domains = <&pd_mfc>;
889 clock-names = "sysmmu", "master";
891 #iommu-cells = <0>;
895 compatible = "samsung,exynos-sysmmu";
896 reg = <0x11D40000 0x1000>;
897 interrupt-parent = <&combiner>;
899 clock-names = "sysmmu", "master";
901 #iommu-cells = <0>;
905 compatible = "samsung,exynos-sysmmu";
906 reg = <0x11F20000 0x1000>;
907 interrupt-parent = <&combiner>;
909 power-domains = <&pd_gsc>;
910 clock-names = "sysmmu", "master";
912 #iommu-cells = <0>;
916 compatible = "samsung,exynos-sysmmu";
917 reg = <0x13260000 0x1000>;
918 interrupt-parent = <&combiner>;
920 clock-names = "sysmmu";
922 #iommu-cells = <0>;
926 compatible = "samsung,exynos-sysmmu";
927 reg = <0x13270000 0x1000>;
928 interrupt-parent = <&combiner>;
930 clock-names = "sysmmu";
932 #iommu-cells = <0>;
936 compatible = "samsung,exynos-sysmmu";
937 reg = <0x132A0000 0x1000>;
938 interrupt-parent = <&combiner>;
940 clock-names = "sysmmu";
942 #iommu-cells = <0>;
946 compatible = "samsung,exynos-sysmmu";
947 reg = <0x13280000 0x1000>;
948 interrupt-parent = <&combiner>;
950 clock-names = "sysmmu";
952 #iommu-cells = <0>;
956 compatible = "samsung,exynos-sysmmu";
957 reg = <0x13290000 0x1000>;
958 interrupt-parent = <&combiner>;
960 clock-names = "sysmmu";
962 #iommu-cells = <0>;
966 compatible = "samsung,exynos-sysmmu";
967 reg = <0x132B0000 0x1000>;
968 interrupt-parent = <&combiner>;
970 clock-names = "sysmmu";
972 #iommu-cells = <0>;
976 compatible = "samsung,exynos-sysmmu";
977 reg = <0x132C0000 0x1000>;
978 interrupt-parent = <&combiner>;
980 clock-names = "sysmmu";
982 #iommu-cells = <0>;
986 compatible = "samsung,exynos-sysmmu";
987 reg = <0x132D0000 0x1000>;
988 interrupt-parent = <&combiner>;
990 clock-names = "sysmmu";
992 #iommu-cells = <0>;
996 compatible = "samsung,exynos-sysmmu";
997 reg = <0x132E0000 0x1000>;
998 interrupt-parent = <&combiner>;
1000 clock-names = "sysmmu";
1002 #iommu-cells = <0>;
1006 compatible = "samsung,exynos-sysmmu";
1007 reg = <0x132F0000 0x1000>;
1008 interrupt-parent = <&combiner>;
1010 clock-names = "sysmmu";
1012 #iommu-cells = <0>;
1016 compatible = "samsung,exynos-sysmmu";
1017 reg = <0x13C40000 0x1000>;
1018 interrupt-parent = <&combiner>;
1020 power-domains = <&pd_gsc>;
1021 clock-names = "sysmmu", "master";
1023 #iommu-cells = <0>;
1027 compatible = "samsung,exynos-sysmmu";
1028 reg = <0x13C50000 0x1000>;
1029 interrupt-parent = <&combiner>;
1031 power-domains = <&pd_gsc>;
1032 clock-names = "sysmmu", "master";
1034 #iommu-cells = <0>;
1038 compatible = "samsung,exynos-sysmmu";
1039 reg = <0x13E80000 0x1000>;
1040 interrupt-parent = <&combiner>;
1042 power-domains = <&pd_gsc>;
1043 clock-names = "sysmmu", "master";
1045 #iommu-cells = <0>;
1049 compatible = "samsung,exynos-sysmmu";
1050 reg = <0x13E90000 0x1000>;
1051 interrupt-parent = <&combiner>;
1053 power-domains = <&pd_gsc>;
1054 clock-names = "sysmmu", "master";
1056 #iommu-cells = <0>;
1060 compatible = "samsung,exynos-sysmmu";
1061 reg = <0x13EA0000 0x1000>;
1062 interrupt-parent = <&combiner>;
1064 power-domains = <&pd_gsc>;
1065 clock-names = "sysmmu", "master";
1067 #iommu-cells = <0>;
1071 compatible = "samsung,exynos-sysmmu";
1072 reg = <0x13EB0000 0x1000>;
1073 interrupt-parent = <&combiner>;
1075 power-domains = <&pd_gsc>;
1076 clock-names = "sysmmu", "master";
1078 #iommu-cells = <0>;
1082 compatible = "samsung,exynos-sysmmu";
1083 reg = <0x14640000 0x1000>;
1084 interrupt-parent = <&combiner>;
1086 power-domains = <&pd_disp1>;
1087 clock-names = "sysmmu", "master";
1089 #iommu-cells = <0>;
1093 compatible = "samsung,exynos-sysmmu";
1094 reg = <0x14650000 0x1000>;
1095 interrupt-parent = <&combiner>;
1097 power-domains = <&pd_disp1>;
1098 clock-names = "sysmmu", "master";
1100 #iommu-cells = <0>;
1105 compatible = "arm,armv7-timer";
1112 * of U-Boot on Exynos don't set the CNTFRQ register,
1115 clock-frequency = <24000000>;
1120 polling-delay-passive = <0>;
1121 polling-delay = <0>;
1122 thermal-sensors = <&tmu 0>;
1124 cooling-maps {
1127 cooling-device = <&cpu0 9 9>, <&cpu1 9 9>;
1131 cooling-device = <&cpu0 15 15>,
1138 power-domains = <&pd_disp1>;
1140 clock-names = "dp";
1142 phy-names = "dp";
1146 power-domains = <&pd_disp1>;
1148 clock-names = "sclk_fimd", "fimd";
1155 clock-names = "fimg2d";
1161 clock-names = "i2c";
1162 pinctrl-names = "default";
1163 pinctrl-0 = <&i2c0_bus>;
1168 clock-names = "i2c";
1169 pinctrl-names = "default";
1170 pinctrl-0 = <&i2c1_bus>;
1175 clock-names = "i2c";
1176 pinctrl-names = "default";
1177 pinctrl-0 = <&i2c2_bus>;
1182 clock-names = "i2c";
1183 pinctrl-names = "default";
1184 pinctrl-0 = <&i2c3_bus>;
1189 clock-names = "secss";
1194 clock-names = "timers";
1199 clock-names = "rtc";
1200 interrupt-parent = <&pmu_system_controller>;
1206 clock-names = "uart", "clk_uart_baud0";
1208 dma-names = "rx", "tx";
1213 clock-names = "uart", "clk_uart_baud0";
1215 dma-names = "rx", "tx";
1220 clock-names = "uart", "clk_uart_baud0";
1222 dma-names = "rx", "tx";
1227 clock-names = "uart", "clk_uart_baud0";
1229 dma-names = "rx", "tx";
1234 clock-names = "secss";
1239 clock-names = "secss";
1242 #include "exynos5250-pinctrl.dtsi"
1243 #include "exynos-syscon-restart.dtsi"