Lines Matching full:assigned
126 assigned-clocks = <&clock CLK_FOUT_EPLL>;
127 assigned-clock-rates = <45158401>;
131 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
137 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
140 assigned-clock-rates = <0>, <0>,
208 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
210 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
211 assigned-clock-rates = <0>, <176000000>;
216 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
218 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
219 assigned-clock-rates = <0>, <176000000>;
224 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
226 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
227 assigned-clock-rates = <0>, <176000000>;
232 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
234 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
235 assigned-clock-rates = <0>, <176000000>;
519 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
520 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;