Lines Matching +full:s3c6410 +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a7";
68 clock-frequency = <1000000000>;
70 clock-names = "cpu";
71 #cooling-cells = <2>;
73 operating-points = <
89 compatible = "arm,cortex-a7";
91 clock-frequency = <1000000000>;
93 clock-names = "cpu";
94 #cooling-cells = <2>;
96 operating-points = <
111 xusbxti: clock-0 {
112 compatible = "fixed-clock";
113 clock-frequency = <0>;
114 #clock-cells = <0>;
115 clock-output-names = "xusbxti";
118 xxti: clock-1 {
119 compatible = "fixed-clock";
120 clock-frequency = <0>;
121 #clock-cells = <0>;
122 clock-output-names = "xxti";
125 xtcxo: clock-2 {
126 compatible = "fixed-clock";
127 clock-frequency = <0>;
128 #clock-cells = <0>;
129 clock-output-names = "xtcxo";
133 compatible = "arm,cortex-a7-pmu";
139 compatible = "simple-bus";
140 #address-cells = <1>;
141 #size-cells = <1>;
145 compatible = "mmio-sram";
147 #address-cells = <1>;
148 #size-cells = <1>;
151 smp-sram@0 {
152 compatible = "samsung,exynos4210-sysram";
156 smp-sram@3f000 {
157 compatible = "samsung,exynos4210-sysram-ns";
163 compatible = "samsung,exynos4210-chipid";
168 compatible = "samsung,exynos3-sysreg", "syscon";
172 pmu_system_controller: system-controller@10020000 {
173 compatible = "samsung,exynos3250-pmu", "syscon";
175 interrupt-controller;
176 #interrupt-cells = <3>;
177 interrupt-parent = <&gic>;
178 clock-names = "clkout8";
180 #clock-cells = <1>;
183 mipi_phy: video-phy {
184 compatible = "samsung,s5pv210-mipi-video-phy";
185 #phy-cells = <1>;
189 pd_cam: power-domain@10023c00 {
190 compatible = "samsung,exynos4210-pd";
192 #power-domain-cells = <0>;
196 pd_mfc: power-domain@10023c40 {
197 compatible = "samsung,exynos4210-pd";
199 #power-domain-cells = <0>;
203 pd_g3d: power-domain@10023c60 {
204 compatible = "samsung,exynos4210-pd";
206 #power-domain-cells = <0>;
210 pd_lcd0: power-domain@10023c80 {
211 compatible = "samsung,exynos4210-pd";
213 #power-domain-cells = <0>;
217 pd_isp: power-domain@10023ca0 {
218 compatible = "samsung,exynos4210-pd";
220 #power-domain-cells = <0>;
224 cmu: clock-controller@10030000 {
225 compatible = "samsung,exynos3250-cmu";
227 #clock-cells = <1>;
228 assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
230 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
234 cmu_dmc: clock-controller@105c0000 {
235 compatible = "samsung,exynos3250-cmu-dmc";
237 #clock-cells = <1>;
240 rtc: rtc@10070000 { label
241 compatible = "samsung,s3c6410-rtc";
245 interrupt-parent = <&pmu_system_controller>;
250 compatible = "samsung,exynos3250-tmu";
254 clock-names = "tmu_apbif";
255 #thermal-sensor-cells = <0>;
259 gic: interrupt-controller@10481000 {
260 compatible = "arm,cortex-a15-gic";
261 #interrupt-cells = <3>;
262 interrupt-controller;
272 compatible = "samsung,exynos4210-mct";
283 clock-names = "fin_pll", "mct";
287 compatible = "samsung,exynos3250-pinctrl";
291 wakeup-interrupt-controller {
292 compatible = "samsung,exynos4210-wakeup-eint";
298 compatible = "samsung,exynos3250-pinctrl";
304 compatible = "samsung,exynos3250-jpeg";
308 clock-names = "jpeg", "sclk";
309 power-domains = <&pd_cam>;
310 assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
311 assigned-clock-rates = <0>, <150000000>;
312 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
318 compatible = "samsung,exynos-sysmmu";
321 clock-names = "sysmmu", "master";
323 power-domains = <&pd_cam>;
324 #iommu-cells = <0>;
328 compatible = "samsung,exynos3250-fimd";
330 interrupt-names = "fifo", "vsync", "lcd_sys";
335 clock-names = "sclk_fimd", "fimd";
336 power-domains = <&pd_lcd0>;
343 compatible = "samsung,exynos3250-mipi-dsi";
346 samsung,phy-type = <0>;
347 power-domains = <&pd_lcd0>;
349 phy-names = "dsim";
351 clock-names = "bus_clk", "pll_clk";
352 #address-cells = <1>;
353 #size-cells = <0>;
358 compatible = "samsung,exynos-sysmmu";
361 clock-names = "sysmmu", "master";
363 power-domains = <&pd_lcd0>;
364 #iommu-cells = <0>;
368 compatible = "samsung,s3c6400-hsotg";
372 clock-names = "otg";
374 phy-names = "usb2-phy";
379 compatible = "samsung,exynos5420-dw-mshc";
383 clock-names = "biu", "ciu";
384 fifo-depth = <0x80>;
385 #address-cells = <1>;
386 #size-cells = <0>;
391 compatible = "samsung,exynos5420-dw-mshc";
395 clock-names = "biu", "ciu";
396 fifo-depth = <0x80>;
397 #address-cells = <1>;
398 #size-cells = <0>;
403 compatible = "samsung,exynos5250-dw-mshc";
407 clock-names = "biu", "ciu";
408 fifo-depth = <0x80>;
409 #address-cells = <1>;
410 #size-cells = <0>;
414 exynos_usbphy: exynos-usbphy@125b0000 {
415 compatible = "samsung,exynos3250-usb2-phy";
417 samsung,pmureg-phandle = <&pmu_system_controller>;
419 clock-names = "phy", "ref";
420 #phy-cells = <1>;
429 clock-names = "apb_pclk";
430 #dma-cells = <1>;
431 #dma-channels = <8>;
432 #dma-requests = <32>;
440 clock-names = "apb_pclk";
441 #dma-cells = <1>;
442 #dma-channels = <8>;
443 #dma-requests = <32>;
447 compatible = "samsung,exynos3250-adc";
450 clock-names = "adc", "sclk";
452 #io-channel-cells = <1>;
453 samsung,syscon-phandle = <&pmu_system_controller>;
458 compatible = "samsung,exynos4210-mali", "arm,mali-400";
471 interrupt-names = "gp",
484 clock-names = "bus", "core";
485 power-domains = <&pd_g3d>;
491 compatible = "samsung,mfc-v7";
494 clock-names = "mfc", "sclk_mfc";
496 power-domains = <&pd_mfc>;
501 compatible = "samsung,exynos-sysmmu";
504 clock-names = "sysmmu", "master";
506 power-domains = <&pd_mfc>;
507 #iommu-cells = <0>;
511 compatible = "samsung,exynos4210-uart";
515 clock-names = "uart", "clk_uart_baud0";
516 pinctrl-names = "default";
517 pinctrl-0 = <&uart0_data &uart0_fctl>;
522 compatible = "samsung,exynos4210-uart";
526 clock-names = "uart", "clk_uart_baud0";
527 pinctrl-names = "default";
528 pinctrl-0 = <&uart1_data>;
533 compatible = "samsung,exynos4210-uart";
537 clock-names = "uart", "clk_uart_baud0";
538 pinctrl-names = "default";
539 pinctrl-0 = <&uart2_data>;
544 #address-cells = <1>;
545 #size-cells = <0>;
546 compatible = "samsung,s3c2440-i2c";
550 clock-names = "i2c";
551 pinctrl-names = "default";
552 pinctrl-0 = <&i2c0_bus>;
557 #address-cells = <1>;
558 #size-cells = <0>;
559 compatible = "samsung,s3c2440-i2c";
563 clock-names = "i2c";
564 pinctrl-names = "default";
565 pinctrl-0 = <&i2c1_bus>;
570 #address-cells = <1>;
571 #size-cells = <0>;
572 compatible = "samsung,s3c2440-i2c";
576 clock-names = "i2c";
577 pinctrl-names = "default";
578 pinctrl-0 = <&i2c2_bus>;
583 #address-cells = <1>;
584 #size-cells = <0>;
585 compatible = "samsung,s3c2440-i2c";
589 clock-names = "i2c";
590 pinctrl-names = "default";
591 pinctrl-0 = <&i2c3_bus>;
596 #address-cells = <1>;
597 #size-cells = <0>;
598 compatible = "samsung,s3c2440-i2c";
602 clock-names = "i2c";
603 pinctrl-names = "default";
604 pinctrl-0 = <&i2c4_bus>;
609 #address-cells = <1>;
610 #size-cells = <0>;
611 compatible = "samsung,s3c2440-i2c";
615 clock-names = "i2c";
616 pinctrl-names = "default";
617 pinctrl-0 = <&i2c5_bus>;
622 #address-cells = <1>;
623 #size-cells = <0>;
624 compatible = "samsung,s3c2440-i2c";
628 clock-names = "i2c";
629 pinctrl-names = "default";
630 pinctrl-0 = <&i2c6_bus>;
635 #address-cells = <1>;
636 #size-cells = <0>;
637 compatible = "samsung,s3c2440-i2c";
641 clock-names = "i2c";
642 pinctrl-names = "default";
643 pinctrl-0 = <&i2c7_bus>;
648 compatible = "samsung,exynos4210-spi";
652 dma-names = "tx", "rx";
653 #address-cells = <1>;
654 #size-cells = <0>;
656 clock-names = "spi", "spi_busclk0";
657 samsung,spi-src-clk = <0>;
658 pinctrl-names = "default";
659 pinctrl-0 = <&spi0_bus>;
664 compatible = "samsung,exynos4210-spi";
668 dma-names = "tx", "rx";
669 #address-cells = <1>;
670 #size-cells = <0>;
672 clock-names = "spi", "spi_busclk0";
673 samsung,spi-src-clk = <0>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&spi1_bus>;
680 compatible = "samsung,s3c6410-i2s";
684 clock-names = "iis", "i2s_opclk0";
686 dma-names = "tx", "rx";
687 pinctrl-0 = <&i2s2_bus>;
688 pinctrl-names = "default";
693 compatible = "samsung,exynos4210-pwm";
700 #pwm-cells = <3>;
705 compatible = "samsung,exynos-ppmu";
711 compatible = "samsung,exynos-ppmu";
717 compatible = "samsung,exynos-ppmu";
723 compatible = "samsung,exynos-ppmu";
726 clock-names = "ppmu";
731 compatible = "samsung,exynos-ppmu";
734 clock-names = "ppmu";
739 compatible = "samsung,exynos-ppmu";
742 clock-names = "ppmu";
747 compatible = "samsung,exynos-ppmu";
750 clock-names = "ppmu";
755 compatible = "samsung,exynos-ppmu";
758 clock-names = "ppmu";
763 compatible = "samsung,exynos-ppmu";
766 clock-names = "ppmu";
771 compatible = "samsung,exynos-ppmu";
774 clock-names = "ppmu";
778 bus_dmc: bus-dmc {
779 compatible = "samsung,exynos-bus";
781 clock-names = "bus";
782 operating-points-v2 = <&bus_dmc_opp_table>;
786 bus_dmc_opp_table: opp-table1 {
787 compatible = "operating-points-v2";
789 opp-50000000 {
790 opp-hz = /bits/ 64 <50000000>;
791 opp-microvolt = <800000>;
793 opp-100000000 {
794 opp-hz = /bits/ 64 <100000000>;
795 opp-microvolt = <800000>;
797 opp-134000000 {
798 opp-hz = /bits/ 64 <134000000>;
799 opp-microvolt = <800000>;
801 opp-200000000 {
802 opp-hz = /bits/ 64 <200000000>;
803 opp-microvolt = <825000>;
805 opp-400000000 {
806 opp-hz = /bits/ 64 <400000000>;
807 opp-microvolt = <875000>;
811 bus_leftbus: bus-leftbus {
812 compatible = "samsung,exynos-bus";
814 clock-names = "bus";
815 operating-points-v2 = <&bus_leftbus_opp_table>;
819 bus_rightbus: bus-rightbus {
820 compatible = "samsung,exynos-bus";
822 clock-names = "bus";
823 operating-points-v2 = <&bus_leftbus_opp_table>;
827 bus_lcd0: bus-lcd0 {
828 compatible = "samsung,exynos-bus";
830 clock-names = "bus";
831 operating-points-v2 = <&bus_leftbus_opp_table>;
835 bus_fsys: bus-fsys {
836 compatible = "samsung,exynos-bus";
838 clock-names = "bus";
839 operating-points-v2 = <&bus_leftbus_opp_table>;
843 bus_mcuisp: bus-mcuisp {
844 compatible = "samsung,exynos-bus";
846 clock-names = "bus";
847 operating-points-v2 = <&bus_mcuisp_opp_table>;
851 bus_isp: bus-isp {
852 compatible = "samsung,exynos-bus";
854 clock-names = "bus";
855 operating-points-v2 = <&bus_isp_opp_table>;
859 bus_peril: bus-peril {
860 compatible = "samsung,exynos-bus";
862 clock-names = "bus";
863 operating-points-v2 = <&bus_peril_opp_table>;
867 bus_mfc: bus-mfc {
868 compatible = "samsung,exynos-bus";
870 clock-names = "bus";
871 operating-points-v2 = <&bus_leftbus_opp_table>;
875 bus_leftbus_opp_table: opp-table2 {
876 compatible = "operating-points-v2";
878 opp-50000000 {
879 opp-hz = /bits/ 64 <50000000>;
880 opp-microvolt = <900000>;
882 opp-80000000 {
883 opp-hz = /bits/ 64 <80000000>;
884 opp-microvolt = <900000>;
886 opp-100000000 {
887 opp-hz = /bits/ 64 <100000000>;
888 opp-microvolt = <1000000>;
890 opp-134000000 {
891 opp-hz = /bits/ 64 <134000000>;
892 opp-microvolt = <1000000>;
894 opp-200000000 {
895 opp-hz = /bits/ 64 <200000000>;
896 opp-microvolt = <1000000>;
900 bus_mcuisp_opp_table: opp-table3 {
901 compatible = "operating-points-v2";
903 opp-50000000 {
904 opp-hz = /bits/ 64 <50000000>;
906 opp-80000000 {
907 opp-hz = /bits/ 64 <80000000>;
909 opp-100000000 {
910 opp-hz = /bits/ 64 <100000000>;
912 opp-200000000 {
913 opp-hz = /bits/ 64 <200000000>;
915 opp-400000000 {
916 opp-hz = /bits/ 64 <400000000>;
920 bus_isp_opp_table: opp-table4 {
921 compatible = "operating-points-v2";
923 opp-50000000 {
924 opp-hz = /bits/ 64 <50000000>;
926 opp-80000000 {
927 opp-hz = /bits/ 64 <80000000>;
929 opp-100000000 {
930 opp-hz = /bits/ 64 <100000000>;
932 opp-200000000 {
933 opp-hz = /bits/ 64 <200000000>;
935 opp-300000000 {
936 opp-hz = /bits/ 64 <300000000>;
940 bus_peril_opp_table: opp-table5 {
941 compatible = "operating-points-v2";
943 opp-50000000 {
944 opp-hz = /bits/ 64 <50000000>;
946 opp-80000000 {
947 opp-hz = /bits/ 64 <80000000>;
949 opp-100000000 {
950 opp-hz = /bits/ 64 <100000000>;
956 #include "exynos3250-pinctrl.dtsi"
957 #include "exynos-syscon-restart.dtsi"