Lines Matching +full:0 +full:x3e000000
32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0>;
44 secondary-boot-reg = <0x35004178>;
52 #address-cells = <0>;
54 reg = <0x3ff01000 0x1000>,
55 <0x3ff00100 0x100>;
60 reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
66 reg = <0x3e000000 0x118>;
76 reg = <0x3e001000 0x118>;
86 reg = <0x3e002000 0x118>;
95 reg = <0x3ff20000 0x1000>;
102 reg = <0x35001f00 0x24>;
107 reg = <0x35006000 0x1c>;
114 reg = <0x35003000 0x524>;
128 reg = <0x3f180000 0x801c>;
136 reg = <0x3f190000 0x801c>;
144 reg = <0x3f1a0000 0x801c>;
152 reg = <0x3f1b0000 0x801c>;
160 reg = <0x3e016000 0x70>;
163 #size-cells = <0>;
170 reg = <0x3e017000 0x70>;
173 #size-cells = <0>;
180 reg = <0x3e018000 0x70>;
183 #size-cells = <0>;
190 reg = <0x3e01c000 0x70>;
193 #size-cells = <0>;
209 #clock-cells = <0>;
215 #clock-cells = <0>;
221 #clock-cells = <0>;
227 #clock-cells = <0>;
233 #clock-cells = <0>;
239 #clock-cells = <0>;
245 #clock-cells = <0>;
251 #clock-cells = <0>;
257 #clock-cells = <0>;
263 #clock-cells = <0>;
269 #clock-cells = <0>;
275 #clock-cells = <0>;
281 #clock-cells = <0>;
287 #clock-cells = <0>;
293 #clock-cells = <0>;
300 reg = <0x35001000 0x0f00>;
307 reg = <0x35002000 0x0f00>;
314 reg = <0x3f001000 0x0f00>;
328 reg = <0x3e011000 0x0f00>;
342 reg = <0x3f120000 0x10000>;
353 reg = <0x3f130000 0x28>;
354 #phy-cells = <0>;