Lines Matching +full:at91rm9200 +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
20 interrupt-parent = <&aic>;
41 #address-cells = <1>;
42 #size-cells = <0>;
45 compatible = "arm,arm926ej-s";
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <0>;
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <1000000>;
77 compatible = "mmio-sram";
79 #address-cells = <1>;
80 #size-cells = <1>;
85 compatible = "simple-bus";
86 #address-cells = <1>;
87 #size-cells = <1>;
91 compatible = "atmel,at91sam9rl-lcdc";
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_fb>;
97 clock-names = "hclk", "lcdc_clk";
102 compatible = "atmel,at91sam9rl-ebi";
103 #address-cells = <2>;
104 #size-cells = <1>;
117 nand_controller: nand-controller {
118 compatible = "atmel,at91sam9g45-nand-controller";
119 #address-cells = <2>;
120 #size-cells = <1>;
127 compatible = "simple-bus";
128 #address-cells = <1>;
129 #size-cells = <1>;
133 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134 #address-cells = <1>;
135 #size-cells = <0>;
141 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
148 #address-cells = <1>;
149 #size-cells = <0>;
150 pinctrl-names = "default";
152 clock-names = "mci_clk";
157 compatible = "atmel,at91sam9260-i2c";
160 #address-cells = <1>;
161 #size-cells = <0>;
167 compatible = "atmel,at91sam9260-i2c";
170 #address-cells = <1>;
171 #size-cells = <0>;
176 compatible = "atmel,at91sam9260-usart";
179 atmel,use-dma-rx;
180 atmel,use-dma-tx;
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_usart0>;
184 clock-names = "usart";
189 compatible = "atmel,at91sam9260-usart";
192 atmel,use-dma-rx;
193 atmel,use-dma-tx;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_usart1>;
197 clock-names = "usart";
202 compatible = "atmel,at91sam9260-usart";
205 atmel,use-dma-rx;
206 atmel,use-dma-tx;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_usart2>;
210 clock-names = "usart";
215 compatible = "atmel,at91sam9260-usart";
218 atmel,use-dma-rx;
219 atmel,use-dma-tx;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_usart3>;
223 clock-names = "usart";
228 compatible = "atmel,at91sam9rl-ssc";
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
237 compatible = "atmel,at91sam9rl-ssc";
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
246 compatible = "atmel,at91sam9rl-pwm";
249 #pwm-cells = <3>;
251 clock-names = "pwm_clk";
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "atmel,at91rm9200-spi";
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_spi0>;
264 clock-names = "spi_clk";
269 compatible = "atmel,at91sam9rl-adc";
273 clock-names = "adc_clk", "adc_op_clk";
274 atmel,adc-use-external-triggers;
275 atmel,adc-channels-used = <0x3f>;
276 atmel,adc-vref = <3300>;
277 atmel,adc-startup-time = <40>;
281 compatible = "atmel,at91sam9rl-udc";
286 clock-names = "pclk", "hclk";
290 dma0: dma-controller@ffffe600 {
291 compatible = "atmel,at91sam9rl-dma";
294 #dma-cells = <2>;
296 clock-names = "dma_clk";
300 compatible = "atmel,at91sam9260-sdramc";
305 compatible = "atmel,at91sam9260-smc", "syscon";
310 compatible = "atmel,at91sam9rl-matrix", "syscon";
314 aic: interrupt-controller@fffff000 {
315 #interrupt-cells = <3>;
316 compatible = "atmel,at91rm9200-aic";
317 interrupt-controller;
319 atmel,external-irqs = <31>;
323 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_dbgu>;
329 clock-names = "usart";
334 #address-cells = <1>;
335 #size-cells = <1>;
336 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
339 atmel,mux-mask =
348 pinctrl_adc0_ts: adc0_ts-0 {
356 pinctrl_adc0_ad0: adc0_ad0-0 {
360 pinctrl_adc0_ad1: adc0_ad1-0 {
364 pinctrl_adc0_ad2: adc0_ad2-0 {
368 pinctrl_adc0_ad3: adc0_ad3-0 {
372 pinctrl_adc0_ad4: adc0_ad4-0 {
376 pinctrl_adc0_ad5: adc0_ad5-0 {
380 pinctrl_adc0_adtrg: adc0_adtrg-0 {
386 pinctrl_dbgu: dbgu-0 {
394 pinctrl_ebi_addr_nand: ebi-addr-0 {
402 pinctrl_fb: fb-0 {
429 pinctrl_i2c_gpio0: i2c_gpio0-0 {
437 pinctrl_i2c_gpio1: i2c_gpio1-0 {
445 pinctrl_mmc0_clk: mmc0_clk-0 {
450 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
456 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
465 pinctrl_nand_rb: nand-rb-0 {
470 pinctrl_nand_cs: nand-cs-0 {
475 pinctrl_nand_oe_we: nand-oe-we-0 {
483 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
487 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
491 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
495 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
499 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
503 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
507 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
511 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
515 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
519 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
523 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
529 pinctrl_spi0: spi0-0 {
538 pinctrl_ssc0_tx: ssc0_tx-0 {
545 pinctrl_ssc0_rx: ssc0_rx-0 {
554 pinctrl_ssc1_tx: ssc1_tx-0 {
561 pinctrl_ssc1_rx: ssc1_rx-0 {
570 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
574 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
578 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
582 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
586 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
590 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
594 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
598 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
602 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
608 pinctrl_usart0: usart0-0 {
614 pinctrl_usart0_rts: usart0_rts-0 {
619 pinctrl_usart0_cts: usart0_cts-0 {
624 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
630 pinctrl_usart0_dcd: usart0_dcd-0 {
635 pinctrl_usart0_ri: usart0_ri-0 {
640 pinctrl_usart0_sck: usart0_sck-0 {
647 pinctrl_usart1: usart1-0 {
653 pinctrl_usart1_rts: usart1_rts-0 {
658 pinctrl_usart1_cts: usart1_cts-0 {
663 pinctrl_usart1_sck: usart1_sck-0 {
670 pinctrl_usart2: usart2-0 {
676 pinctrl_usart2_rts: usart2_rts-0 {
681 pinctrl_usart2_cts: usart2_cts-0 {
686 pinctrl_usart2_sck: usart2_sck-0 {
693 pinctrl_usart3: usart3-0 {
699 pinctrl_usart3_rts: usart3_rts-0 {
704 pinctrl_usart3_cts: usart3_cts-0 {
709 pinctrl_usart3_sck: usart3_sck-0 {
716 compatible = "atmel,at91rm9200-gpio";
719 #gpio-cells = <2>;
720 gpio-controller;
721 interrupt-controller;
722 #interrupt-cells = <2>;
727 compatible = "atmel,at91rm9200-gpio";
730 #gpio-cells = <2>;
731 gpio-controller;
732 interrupt-controller;
733 #interrupt-cells = <2>;
738 compatible = "atmel,at91rm9200-gpio";
741 #gpio-cells = <2>;
742 gpio-controller;
743 interrupt-controller;
744 #interrupt-cells = <2>;
749 compatible = "atmel,at91rm9200-gpio";
752 #gpio-cells = <2>;
753 gpio-controller;
754 interrupt-controller;
755 #interrupt-cells = <2>;
761 compatible = "atmel,at91sam9rl-pmc", "syscon";
764 #clock-cells = <2>;
766 clock-names = "slow_clk", "main_xtal";
770 compatible = "atmel,at91sam9260-rstc";
776 compatible = "atmel,at91sam9260-shdwc";
782 compatible = "atmel,at91sam9260-pit";
789 compatible = "atmel,at91sam9260-wdt";
797 compatible = "atmel,at91sam9x5-sckc";
800 #clock-cells = <0>;
803 rtc@fffffd20 {
804 compatible = "atmel,at91sam9260-rtt";
812 compatible = "atmel,at91sam9260-gpbr", "syscon";
817 rtc@fffffe00 {
818 compatible = "atmel,at91rm9200-rtc";
828 i2c-gpio-0 {
829 compatible = "i2c-gpio";
832 i2c-gpio,sda-open-drain;
833 i2c-gpio,scl-open-drain;
834 i2c-gpio,delay-us = <2>; /* ~100 kHz */
835 #address-cells = <1>;
836 #size-cells = <0>;
837 pinctrl-names = "default";
838 pinctrl-0 = <&pinctrl_i2c_gpio0>;
842 i2c-gpio-1 {
843 compatible = "i2c-gpio";
846 i2c-gpio,sda-open-drain;
847 i2c-gpio,scl-open-drain;
848 i2c-gpio,delay-us = <2>; /* ~100 kHz */
849 #address-cells = <1>;
850 #size-cells = <0>;
851 pinctrl-names = "default";
852 pinctrl-0 = <&pinctrl_i2c_gpio1>;