Lines Matching +full:omap4 +full:- +full:gpio

4  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/clock/am4.h>
18 interrupt-parent = <&wakeupgen>;
19 #address-cells = <1>;
20 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
47 compatible = "arm,cortex-a9";
48 enable-method = "ti,am4372";
53 clock-names = "cpu";
55 operating-points-v2 = <&cpu0_opp_table>;
57 clock-latency = <300000>; /* From omap-cpufreq driver */
58 cpu-idle-states = <&mpu_gate>;
61 idle-states {
63 compatible = "arm,idle-state";
64 entry-latency-us = <40>;
65 exit-latency-us = <100>;
66 min-residency-us = <300>;
67 local-timer-stop;
72 cpu0_opp_table: opp-table {
73 compatible = "operating-points-v2-ti-cpu";
76 opp50-300000000 {
77 opp-hz = /bits/ 64 <300000000>;
78 opp-microvolt = <950000 931000 969000>;
79 opp-supported-hw = <0xFF 0x01>;
80 opp-suspend;
83 opp100-600000000 {
84 opp-hz = /bits/ 64 <600000000>;
85 opp-microvolt = <1100000 1078000 1122000>;
86 opp-supported-hw = <0xFF 0x04>;
89 opp120-720000000 {
90 opp-hz = /bits/ 64 <720000000>;
91 opp-microvolt = <1200000 1176000 1224000>;
92 opp-supported-hw = <0xFF 0x08>;
95 oppturbo-800000000 {
96 opp-hz = /bits/ 64 <800000000>;
97 opp-microvolt = <1260000 1234800 1285200>;
98 opp-supported-hw = <0xFF 0x10>;
101 oppnitro-1000000000 {
102 opp-hz = /bits/ 64 <1000000000>;
103 opp-microvolt = <1325000 1298500 1351500>;
104 opp-supported-hw = <0xFF 0x20>;
109 compatible = "ti,omap-infra";
112 gic: interrupt-controller@48241000 {
113 compatible = "arm,cortex-a9-gic";
114 interrupt-controller;
115 #interrupt-cells = <3>;
118 interrupt-parent = <&gic>;
121 wakeupgen: interrupt-controller@48281000 {
122 compatible = "ti,omap4-wugen-mpu";
123 interrupt-controller;
124 #interrupt-cells = <3>;
126 interrupt-parent = <&gic>;
130 compatible = "arm,cortex-a9-scu";
135 compatible = "arm,cortex-a9-global-timer";
138 interrupt-parent = <&gic>;
143 compatible = "arm,cortex-a9-twd-timer";
146 interrupt-parent = <&gic>;
150 cache-controller@48242000 {
151 compatible = "arm,pl310-cache";
153 cache-unified;
154 cache-level = <2>;
158 compatible = "simple-pm-bus";
159 power-domains = <&prm_per>;
161 clock-names = "fck";
162 #address-cells = <1>;
163 #size-cells = <1>;
165 ti,no-idle;
167 l3-noc@44000000 {
168 compatible = "ti,am4372-l3-noc";
182 target-module@4c000000 {
183 compatible = "ti,sysc-omap4-simple", "ti,sysc";
185 reg-names = "rev";
187 clock-names = "fck";
188 ti,no-idle;
189 #address-cells = <1>;
190 #size-cells = <1>;
194 compatible = "ti,emif-am4372";
202 target-module@49000000 {
203 compatible = "ti,sysc-omap4", "ti,sysc";
205 reg-names = "rev";
207 clock-names = "fck";
208 #address-cells = <1>;
209 #size-cells = <1>;
213 compatible = "ti,edma3-tpcc";
215 reg-names = "edma3_cc";
219 interrupt-names = "edma3_ccint", "edma3_mperr",
221 dma-requests = <64>;
222 #dma-cells = <2>;
227 ti,edma-memcpy-channels = <58 59>;
231 target-module@49800000 {
232 compatible = "ti,sysc-omap4", "ti,sysc";
235 reg-names = "rev", "sysc";
236 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
237 ti,sysc-midle = <SYSC_IDLE_FORCE>;
238 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
241 clock-names = "fck";
242 #address-cells = <1>;
243 #size-cells = <1>;
247 compatible = "ti,edma3-tptc";
250 interrupt-names = "edma3_tcerrint";
254 target-module@49900000 {
255 compatible = "ti,sysc-omap4", "ti,sysc";
258 reg-names = "rev", "sysc";
259 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
260 ti,sysc-midle = <SYSC_IDLE_FORCE>;
261 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
264 clock-names = "fck";
265 #address-cells = <1>;
266 #size-cells = <1>;
270 compatible = "ti,edma3-tptc";
273 interrupt-names = "edma3_tcerrint";
277 target-module@49a00000 {
278 compatible = "ti,sysc-omap4", "ti,sysc";
281 reg-names = "rev", "sysc";
282 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
283 ti,sysc-midle = <SYSC_IDLE_FORCE>;
284 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
287 clock-names = "fck";
288 #address-cells = <1>;
289 #size-cells = <1>;
293 compatible = "ti,edma3-tptc";
296 interrupt-names = "edma3_tcerrint";
300 target-module@47810000 {
301 compatible = "ti,sysc-omap2", "ti,sysc";
305 reg-names = "rev", "sysc", "syss";
306 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
310 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
313 ti,syss-mask = <1>;
315 clock-names = "fck";
316 #address-cells = <1>;
317 #size-cells = <1>;
321 compatible = "ti,am437-sdhci";
322 ti,needs-special-reset;
329 sham_target: target-module@53100000 {
330 compatible = "ti,sysc-omap3-sham", "ti,sysc";
334 reg-names = "rev", "sysc", "syss";
335 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
337 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
340 ti,syss-mask = <1>;
343 clock-names = "fck";
344 #address-cells = <1>;
345 #size-cells = <1>;
349 compatible = "ti,omap5-sham";
352 dma-names = "rx";
357 aes_target: target-module@53501000 {
358 compatible = "ti,sysc-omap2", "ti,sysc";
362 reg-names = "rev", "sysc", "syss";
363 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
365 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
369 ti,syss-mask = <1>;
372 clock-names = "fck";
373 #address-cells = <1>;
374 #size-cells = <1>;
378 compatible = "ti,omap4-aes";
383 dma-names = "tx", "rx";
387 des_target: target-module@53701000 {
388 compatible = "ti,sysc-omap2", "ti,sysc";
392 reg-names = "rev", "sysc", "syss";
393 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
395 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
399 ti,syss-mask = <1>;
402 clock-names = "fck";
403 #address-cells = <1>;
404 #size-cells = <1>;
408 compatible = "ti,omap4-des";
413 dma-names = "tx", "rx";
417 pruss_tm: target-module@54400000 {
418 compatible = "ti,sysc-pruss", "ti,sysc";
421 reg-names = "rev", "sysc";
422 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
424 ti,sysc-midle = <SYSC_IDLE_FORCE>,
427 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
431 clock-names = "fck";
433 reset-names = "rstctrl";
434 #address-cells = <1>;
435 #size-cells = <1>;
439 compatible = "ti,am4376-pruss1";
441 #address-cells = <1>;
442 #size-cells = <1>;
449 reg-names = "dram0", "dram1",
454 compatible = "ti,pruss-cfg", "syscon";
456 #address-cells = <1>;
457 #size-cells = <1>;
461 #address-cells = <1>;
462 #size-cells = <0>;
464 pruss1_iepclk_mux: iepclk-mux@30 {
466 #clock-cells = <0>;
473 pruss1_mii_rt: mii-rt@32000 {
474 compatible = "ti,pruss-mii", "syscon";
478 pruss1_intc: interrupt-controller@20000 {
479 compatible = "ti,pruss-intc";
481 interrupt-controller;
482 #interrupt-cells = <3>;
490 interrupt-names = "host_intr0", "host_intr1",
494 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
498 compatible = "ti,am4376-pru";
502 reg-names = "iram", "control", "debug";
503 firmware-name = "am437x-pru1_0-fw";
507 compatible = "ti,am4376-pru";
511 reg-names = "iram", "control", "debug";
512 firmware-name = "am437x-pru1_1-fw";
519 clock-names = "fck";
521 #address-cells = <1>;
522 #size-cells = <0>;
527 compatible = "ti,am4376-pruss0";
529 #address-cells = <1>;
530 #size-cells = <1>;
536 reg-names = "dram0", "dram1";
540 compatible = "ti,pruss-cfg", "syscon";
542 #address-cells = <1>;
543 #size-cells = <1>;
547 #address-cells = <1>;
548 #size-cells = <0>;
550 pruss0_iepclk_mux: iepclk-mux@30 {
552 #clock-cells = <0>;
559 pruss0_mii_rt: mii-rt@72000 {
560 compatible = "ti,pruss-mii", "syscon";
565 pruss0_intc: interrupt-controller@60000 {
566 compatible = "ti,pruss-intc";
568 interrupt-controller;
569 #interrupt-cells = <3>;
577 interrupt-names = "host_intr0", "host_intr1",
581 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
585 compatible = "ti,am4376-pru";
589 reg-names = "iram", "control", "debug";
590 firmware-name = "am437x-pru0_0-fw";
594 compatible = "ti,am4376-pru";
598 reg-names = "iram", "control", "debug";
599 firmware-name = "am437x-pru0_1-fw";
604 target-module@50000000 {
605 compatible = "ti,sysc-omap2", "ti,sysc";
609 reg-names = "rev", "sysc", "syss";
610 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
613 ti,syss-mask = <1>;
615 clock-names = "fck";
616 #address-cells = <1>;
617 #size-cells = <1>;
622 compatible = "ti,am3352-gpmc";
624 dma-names = "rxtx";
626 clock-names = "fck";
629 gpmc,num-cs = <7>;
630 gpmc,num-waitpins = <2>;
631 #address-cells = <2>;
632 #size-cells = <1>;
633 interrupt-controller;
634 #interrupt-cells = <2>;
635 gpio-controller;
636 #gpio-cells = <2>;
641 target-module@47900000 {
642 compatible = "ti,sysc-omap4", "ti,sysc";
645 reg-names = "rev", "sysc";
646 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
651 clock-names = "fck";
652 #address-cells = <1>;
653 #size-cells = <1>;
658 compatible = "ti,am4372-qspi";
661 reg-names = "qspi_base", "qspi_mmap";
663 clock-names = "fck";
664 #address-cells = <1>;
665 #size-cells = <0>;
667 num-cs = <4>;
671 target-module@40300000 {
672 compatible = "ti,sysc-omap4-simple", "ti,sysc";
674 clock-names = "fck";
675 ti,no-idle;
676 #address-cells = <1>;
677 #size-cells = <1>;
681 compatible = "mmio-sram";
684 #address-cells = <1>;
685 #size-cells = <1>;
687 pm_sram_code: pm-code-sram@0 {
690 protect-exec;
693 pm_sram_data: pm-data-sram@1000 {
701 target-module@56000000 {
702 compatible = "ti,sysc-omap4", "ti,sysc";
705 reg-names = "rev", "sysc";
706 ti,sysc-midle = <SYSC_IDLE_FORCE>,
709 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
713 clock-names = "fck";
714 power-domains = <&prm_gfx>;
716 reset-names = "rstctrl";
717 #address-cells = <1>;
718 #size-cells = <1>;
724 #include "am437x-l4.dtsi"
725 #include "am43xx-clocks.dtsi"
729 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
731 #power-domain-cells = <0>;
735 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
737 #power-domain-cells = <0>;
738 #reset-cells = <1>;
742 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
744 #power-domain-cells = <0>;
748 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
750 #power-domain-cells = <0>;
754 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
756 #power-domain-cells = <0>;
760 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
762 #reset-cells = <1>;
763 #power-domain-cells = <0>;
767 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
769 #reset-cells = <1>;
770 #power-domain-cells = <0>;
774 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
776 #reset-cells = <1>;
780 /* Preferred always-on timer for clocksource */
782 ti,no-reset-on-init;
783 ti,no-idle;
786 clock-names = "fck", "ick";
788 assigned-clocks = <&timer1_fck>;
789 assigned-clock-parents = <&sys_clkin_ck>;
795 ti,no-reset-on-init;
796 ti,no-idle;
799 clock-names = "fck", "ick";
801 assigned-clocks = <&timer2_fck>;
802 assigned-clock-parents = <&sys_clkin_ck>;