Lines Matching full:maintenance

882 	  corrects this value, ensuring cache maintenance operations which use
891 	  broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
957 	bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
963 	  cache line maintenance operation by MVA targeting an Inner
967 	  relevant cache maintenance functions and sets a specific bit
971        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
975 	 r2p6,r2p8,r2p10,r3p0) erratum. In case a data cache maintenance
978 	 an abort may occur on cache maintenance.
1102 	bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
1105 	  The v7 ARM states that all cache and branch predictor maintenance
1108 	  However, because of this erratum, an L2 set/way cache maintenance
1109 	  operation can overtake an L1 set/way cache maintenance operation.