Lines Matching +full:mode +full:- +full:reg
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
8 * if we are NOT in user mode, stack is switched to kernel mode.
10 * it's prologue including stack switching from user mode
13 * -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
20 * -Modified CALLEE_REG save/restore macros to handle the fact that
22 * - Defined Stack Switching Macro to be reused in all intr/excp hdlrs
23 * - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the
32 #include <asm/asm-offsets.h>
33 #include <asm/irqflags-compact.h>
36 /*--------------------------------------------------------------
37 * Switch to Kernel Mode stack if SP points to User Mode stack
39 * Entry : r9 contains pre-IRQ/exception/trap status32
40 * Exit : SP set to K mode stack
41 * SP at the time of entry (K/U) saved @ pt_regs->sp
43 *-------------------------------------------------------------*/
47 /* User Mode when this happened ? Yes: Proceed to switch stack */
50 /* OK we were already in kernel mode when this event happened, thus can
51 * assume SP is kernel mode SP. _NO_ need to do any stack switching
58 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
61 * Thay way although L2 IRQ happened in Kernel mode, stack is still
63 * To handle this, we may need to switch stack even if in kernel mode
64 * provided SP has values in range of USER mode stack ( < 0x7000_0000 )
72 * Above brlo alone would treat it as a valid L1-L2 scenario
75 * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
81 /*------Intr/Ecxp happened in kernel mode, SP already setup ------ */
82 /* save it nevertheless @ pt_regs->sp for uniformity */
85 st sp, [sp, PT_sp - SZ_PT_REGS]
87 88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */
91 /* With current tsk in r9, get it's kernel mode stack base */
94 /* save U mode SP @ pt_regs->sp */
95 st sp, [r9, PT_sp - SZ_PT_REGS]
102 /*------------------------------------------------------------
104 * This is to re-enable Exceptions within exception
106 *-------------------------------------------------------------*/
120 /*--------------------------------------------------------------
121 * For early Exception/ISR Prologue, a core reg is temporarily needed to
123 * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).
125 * Before saving the full regfile - this reg is restored back, only
126 * to be saved again on kernel mode stack, as part of pt_regs.
127 *-------------------------------------------------------------*/
128 .macro PROLOG_FREEUP_REG reg, mem
129 st \reg, [\mem]
132 .macro PROLOG_RESTORE_REG reg, mem
133 ld \reg, [\mem]
136 /*--------------------------------------------------------------
138 * -Switches stack to K mode (if not already)
139 * -Saves the register file
142 *-------------------------------------------------------------*/
145 /* Need at least 1 reg to code the early exception prologue */
148 /* U/K mode at time of exception (stack not switched if already K) */
151 /* ARC700 doesn't provide auto-stack switching */
155 /* Treat r25 as scratch reg (save on stack) and load with "current" */
162 st.a r0, [sp, -8] /* orig_r0 needed for syscall (skip ECR slot) */
163 sub sp, sp, 4 /* skip pt_regs->sp, already saved above */
184 /*--------------------------------------------------------------
191 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
194 *-------------------------------------------------------------*/
227 /* Which mode (user/kernel) was the system in when intr occurred */
233 /* Treat r25 as scratch reg (save on stack) and load with "current" */
242 skip pt_regs->sp, already saved above */
260 /*--------------------------------------------------------------
265 * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
268 *-------------------------------------------------------------*/
293 .macro GET_CURR_THR_INFO_FROM_SP reg
294 bic \reg, sp, (THREAD_SIZE - 1)
297 /* Get CPU-ID of this core */
298 .macro GET_CPU_ID reg
299 lr \reg, [identity]
300 lsr \reg, \reg, 8
301 bmsk \reg, \reg, 7