Lines Matching +full:slave +full:- +full:mode

7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx and compatible SSP.
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
21 -----------------------------------
23 arch/.../mach-*/board-*.c as a "platform device". The master configuration
33 slave device (chips) attached to this SPI master.
44 ------------------
66 	.name = "pxa2xx-spi", /* MUST BE THIS VALUE, so device match driver */
84 Declaring Slave Devices
85 -----------------------
86 Typically, for a legacy platform, each SPI slave (chip) is defined in the
87 arch/.../mach-*/board-*.c using the "spi_board_info" structure found in
88 "linux/spi/spi.h". See "Documentation/spi/spi-summary.rst" for additional
91 Each slave device attached to the PXA must provide slave specific configuration
94 will uses the configuration whenever the driver communicates with the slave
111 FIFO overruns (especially in PIO mode transfers). Good default values are::
121 to determine the correct value. An SSP configured for byte-wide transfers would
128 slave device.  Please note that the PXA2xx SSP 1 does not support trailing byte
129 timeouts and must busy-wait any trailing bytes.
132 into internal loopback mode.  In this mode the SSP controller internally
137 function for asserting/deasserting a slave device chip select.  If the field is
147 NSSP SLAVE SAMPLE
148 -----------------
155   /* Chip Select control for the CS8415A SPI slave device */
164   /* Chip Select control for the CS8405A SPI slave device */
197 		.irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */
205 		.irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */
217 -----------------------
219 transfers.  The driver defaults to PIO mode and DMA transfers must be enabled
223 mode supports both coherent and stream based DMA mappings.
236 	use coherent DMA mode
239 	use streaming DMA mode
245 ---------