Lines Matching full:switch
5 This document describes the **Distributed Switch Architecture (DSA)** subsystem
13 The Distributed Switch Architecture is a subsystem which was primarily designed
19 they configured/queried a switch port network device or a regular network
22 An Ethernet switch is typically comprised of multiple front-panel ports, and one
25 receiving Ethernet frames from the switch. This is a very common setup for all
34 of multiple switches connected to each other is called a "switch tree".
41 The ideal case for using DSA is when an Ethernet switch supports a "switch tag"
42 which is a hardware feature making the switch insert a specific tag for each
57 - the "cpu" port is the Ethernet switch facing side of the management
65 Switch tagging protocols
82 1. The switch-specific frame header is located before the Ethernet header,
85 2. The switch-specific frame header is located before the EtherType, keeping
88 3. The switch-specific frame header is located at the tail of the packet,
92 A tagging protocol may tag all packets with switch tags of the same length, or
94 require an extended switch tag, or there might be one tag length on TX and a
97 with the length in octets of the longest switch frame header/trailer. The DSA
103 that the act of pushing the switch tag on transmission of a packet does not
111 characteristics of the interaction required between the switch hardware and the
117 switch tree use the same tagging protocol. In case of a packet transiting a
118 fabric with more than one switch, the switch-specific frame header is inserted
119 by the first switch in the fabric that the packet was received on. This header
124 other switches from the same fabric, and in this case, the outermost switch
128 by a leaf switch (not connected directly to the CPU) to not be the same as what
129 the network stack sees. This can be seen with Marvell switch trees, where the
133 It still remains the case that, if the DSA switch tree is configured for the
136 because the Marvell switch connected directly to the CPU is configured to
142 no DSA links in this fabric, and each switch constitutes a disjoint DSA switch
144 port of the upstream DSA switch) and a CPU port (the in-facing port of the
145 downstream DSA switch).
147 The tagging protocol of the attached DSA switch tree can be viewed through the
152 If the hardware and driver are capable, the tagging protocol of the DSA switch
155 all attached switch ports must be down while doing this).
161 regardless of the driver used for the switch control path, and the driver used
169 The job of this method is to prepare the skb in a way that the switch will
183 switch port that the packet was received on.
213 Ethernet switch.
220 switch specific tagging protocol. DSA accomplishes this by registering a
249 -> invoke switch tag specific protocol handler in 'net/dsa/tag_*.c'
253 - inspect and strip switch tag protocol to determine originating port
266 controlling and data-flowing end-point for each front-panel port of the switch.
269 - insert/remove the switch tag protocol (if it exists) when sending traffic
270 to/from specific switch ports
271 - query the switch for ethtool operations: statistics, link state,
277 stack/ethtool, and the switch driver implementation.
280 switch tagging protocol is currently registered with these network devices, and
282 switch tag in the Ethernet frames.
285 ``ndo_start_xmit()`` function, since they contain the appropriate switch tag, the
286 Ethernet switch will be able to process these incoming frames from the
287 management interface and delivers these frames to the physical switch port.
303 | DSA switch driver |
307 switch driver | | switch driver
316 switch hardware | | switch hardware
319 | Switch |
327 In order to be able to read to/from a switch PHY built into it, DSA creates a
328 slave MDIO bus which allows a specific switch driver to divert and intercept
331 to return standard MII registers from the switch builtin PHYs, allowing the PHY
337 internal or external MDIO devices this switch might be connected to: internal
346 - ``dsa_chip_data``: platform data configuration for a given switch device,
347 this structure describes a switch device's parent device, its address, as
353 the master network device this switch tree is attached to needs to be
358 the tagging protocol supported by the switch tree, and which receive/transmit
360 switch is also provided: CPU port. Finally, a collection of dsa_switch are
363 - ``dsa_switch``: structure describing a switch device in the tree, referencing
379 - inability to fetch switch CPU port statistics counters using ethtool, which
380 can make it harder to debug MDIO switch connected using xMII interfaces
392 non-NULL), and the switch behind it expects a tagging protocol, this network
395 will not make us go through the switch tagging protocol transmit function, so
396 the Ethernet switch on the other end, expecting a tag will typically drop this
416 - internal PHY devices, built into the Ethernet switch hardware
434 - finally, if the PHY is built into the switch, as is very common with
435 standalone switch packages, the PHY is probed using the slave MII bus created
450 DSA registers one devlink device per physical switch in the fabric.
489 DSA switch drivers need to implement a dsa_switch_ops structure which will
498 Switch configuration
505 registration to test for the presence/absence of a switch device. For MDIO
507 the switch pseudo-PHY and return whether this is a supported device. For other
510 - ``setup``: setup function for the switch, this function is responsible for setting
513 configure the switch to separate all network interfaces from each other, that
514 is, they should be isolated by the switch hardware itself, typically by creating
517 platform should be disabled. Past this function, the switch is expected to be
519 to issue a software reset of the switch during this setup function in order to
528 on its own (e.g.: coming from switch memory mapped registers), this function
529 should return a 32-bits bitmask of "flags", that is private between the switch
533 the switch port MDIO registers. If unavailable, return 0xffff for each read.
534 For builtin switch Ethernet PHYs, this function should allow reading the link
538 to the switch port MDIO registers. If unavailable return a negative error
543 configuring the switch port link parameters: speed, duplex, pause based on
547 the fixed PHY driver asking the switch driver for link parameters that could
561 RX/TX counters from the network device, with switch driver specific statistics
573 - ``set_eee``: ethtool function which is used to configure a switch port EEE (Green
575 PHY level if relevant. This function should enable EEE at the switch port MAC
578 - ``get_eee``: ethtool function which is used to query a switch port EEE settings,
579 this function should return the EEE state of the switch port MAC controller
583 - ``get_eeprom_len``: ethtool function returning for a given switch the EEPROM
586 - ``get_eeprom``: ethtool function returning for a given switch the EEPROM contents
588 - ``set_eeprom``: ethtool function writing specified data to a given switch EEPROM
591 switch
593 - ``get_regs``: ethtool function returning the Ethernet switch internal register
601 suspend, should quiesce all Ethernet switch activities, but keep ports
606 should resume all Ethernet switch activities and re-configure the switch to be
611 fully enabling a given switch port. DSA takes care of marking the port with
617 fully disabling a given switch port. DSA takes care of marking the port with
624 - ``port_bridge_join``: bridge layer function invoked when a given switch port is
625 added to a bridge, this function should be doing the necessary at the switch
629 - ``port_bridge_leave``: bridge layer function invoked when a given switch port is
631 switch level to deny the leaving port from ingress/egress traffic from the
633 out at the switch hardware for the switch to (re) learn MAC addresses behind
636 - ``port_stp_state_set``: bridge layer function invoked when a given switch port STP
637 state is computed by the bridge layer and should be propagated to switch
638 hardware to forward/block/learn traffic. The switch driver is responsible for
644 learning. The switch driver is responsible for initial setup of the
677 VLAN ID map/rules. If there is no PVID programmed into the switch port,
678 untagged frames must be rejected as well. When turned off the switch must
683 (tagged or untagged) for the given switch port. If the operation is not
688 given switch port
695 Forwarding Database entry, the switch hardware should be programmed with the
705 Forwarding Database entry, the switch hardware should be programmed to delete
716 software implementation. The switch hardware should be programmed with the
724 multicast database entry, the switch hardware should be programmed to delete
750 - ``port_lag_join``: function invoked when a given switch port is added to a
754 - ``port_lag_leave``: function invoked when a given switch port leaves a LAG
763 retrieved by a DSA switch driver using the ``dsa_lag_id`` function.
813 interface with a physical switch port does not produce the expected result).
820 - ``port_hsr_join``: function invoked when a given switch port is added to a
824 - ``port_hsr_leave``: function invoked when a given switch port leaves a
834 capable hardware, but does not enforce a strict switch device driver model. On
836 of the switch specific. At some point we should envision a merger between these