Lines Matching +full:mux +full:- +full:locked
6 than a straight-forward I2C bus with one adapter and one or more devices.
8 1. A mux may be needed on the bus to prevent address collisions.
23 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
26 Depending of the particular mux driver, something happens when there is
27 an I2C transfer on one of its child adapters. The mux driver can
28 obviously operate a mux, but it can also do arbitration with an external
29 bus master or open a gate. The mux driver has two operations for this,
38 mux-locked or parent-locked muxes. As is evident from below, it can be
39 useful to know if a mux is mux-locked or if it is parent-locked. The
45 i2c-arb-gpio-challenge Parent-locked
46 i2c-mux-gpio Normally parent-locked, mux-locked iff
48 same I2C root adapter that they mux.
49 i2c-mux-gpmux Normally parent-locked, mux-locked iff
50 specified in device-tree.
51 i2c-mux-ltc4306 Mux-locked
52 i2c-mux-mlxcpld Parent-locked
53 i2c-mux-pca9541 Parent-locked
54 i2c-mux-pca954x Parent-locked
55 i2c-mux-pinctrl Normally parent-locked, mux-locked iff
57 by the same I2C root adapter that they mux.
58 i2c-mux-reg Parent-locked
64 gyro/mpu3050 Mux-locked
65 imu/inv_mpu6050/ Mux-locked
71 dvb-frontends/lgdt3306a Mux-locked
72 dvb-frontends/m88ds3103 Parent-locked
73 dvb-frontends/rtl2830 Parent-locked
74 dvb-frontends/rtl2832 Mux-locked
75 dvb-frontends/si2168 Mux-locked
76 usb/cx231xx/ Parent-locked
80 Mux-locked muxes
81 ----------------
83 Mux-locked muxes does not lock the entire parent adapter during the
84 full select-transfer-deselect transaction, only the muxes on the parent
85 adapter are locked. Mux-locked muxes are mostly interesting if the
87 their tasks. Since the parent adapter is not fully locked during the
89 stages of the transaction. This has the benefit that the mux driver
93 ML1. If you build a topology with a mux-locked mux being the parent
94 of a parent-locked mux, this might break the expectation from the
95 parent-locked mux that the root adapter is locked during the
99 mux-locked muxes that are not siblings, when there are address
101 non-sibling muxes.
103 I.e. the select-transfer-deselect transaction targeting e.g. device
104 address 0x42 behind mux-one may be interleaved with a similar
105 operation targeting device address 0x42 behind mux-two. The
107 be that mux-one and mux-two should not be selected simultaneously,
108 but mux-locked muxes do not guarantee that in all topologies.
110 ML3. A mux-locked mux cannot be used by a driver for auto-closing
115 ML4. If any non-I2C operation in the mux driver changes the I2C mux state,
118 behind the mux, when an unrelated I2C transfer is in flight during
119 the non-I2C mux-changing operation.
123 Mux-locked Example
124 ------------------
129 .----------. .--------.
130 .--------. | mux- |-----| dev D1 |
131 | root |--+--| locked | '--------'
132 '--------' | | mux M1 |--. .--------.
133 | '----------' '--| dev D2 |
134 | .--------. '--------'
135 '--| dev D3 |
136 '--------'
142 3. M1 calls ->select to ready the mux.
148 6. M1 calls ->deselect, if it has one.
149 7. Same rules as in step 4, but for ->deselect.
157 Parent-locked muxes
158 -------------------
160 Parent-locked muxes lock the parent adapter during the full select-
161 transfer-deselect transaction. The implication is that the mux driver
168 PL1. If you build a topology with a parent-locked mux being the child
169 of another mux, this might break a possible assumption from the
170 child mux that the root adapter is unused between its select op
171 and the actual transfer (e.g. if the child mux is auto-closing
172 and the parent mux issues I2C transfers as part of its select).
173 This is especially the case if the parent mux is mux-locked, but
174 it may also happen if the parent mux is parent-locked.
184 Parent-locked Example
185 ---------------------
189 .----------. .--------.
190 .--------. | parent- |-----| dev D1 |
191 | root |--+--| locked | '--------'
192 '--------' | | mux M1 |--. .--------.
193 | '----------' '--| dev D2 |
194 | .--------. '--------'
195 '--| dev D3 |
196 '--------'
203 4. M1 calls ->select to ready the mux.
210 7. M1 calls ->deselect, if it has one.
211 8. Same rules as in step 5, but for ->deselect.
216 This means that accesses to both D2 and D3 are locked out for the full
223 Parent-locked mux as parent of parent-locked mux
224 ------------------------------------------------
228 .----------. .----------. .--------.
229 .--------. | parent- |-----| parent- |-----| dev D1 |
230 | root |--+--| locked | | locked | '--------'
231 '--------' | | mux M1 |--. | mux M2 |--. .--------.
232 | '----------' | '----------' '--| dev D2 |
233 | .--------. | .--------. '--------'
234 '--| dev D4 | '--| dev D3 |
235 '--------' '--------'
237 When any device is accessed, all other devices are locked out for
242 This topology is bad if M2 is an auto-closing mux and M1->select
247 Mux-locked mux as parent of mux-locked mux
248 ------------------------------------------
252 .----------. .----------. .--------.
253 .--------. | mux- |-----| mux- |-----| dev D1 |
254 | root |--+--| locked | | locked | '--------'
255 '--------' | | mux M1 |--. | mux M2 |--. .--------.
256 | '----------' | '----------' '--| dev D2 |
257 | .--------. | .--------. '--------'
258 '--| dev D4 | '--| dev D3 |
259 '--------' '--------'
261 When device D1 is accessed, accesses to D2 are locked out for the
263 are locked). But accesses to D3 and D4 are possibly interleaved at
268 Mux-locked mux as parent of parent-locked mux
269 ---------------------------------------------
273 .----------. .----------. .--------.
274 .--------. | mux- |-----| parent- |-----| dev D1 |
275 | root |--+--| locked | | locked | '--------'
276 '--------' | | mux M1 |--. | mux M2 |--. .--------.
277 | '----------' | '----------' '--| dev D2 |
278 | .--------. | .--------. '--------'
279 '--| dev D4 | '--| dev D3 |
280 '--------' '--------'
282 When device D1 is accessed, accesses to D2 and D3 are locked out
289 be no I2C transfers during its calls to ->select and ->deselect, and
294 The topology is especially troublesome if M2 is an auto-closing
295 mux. In that case, any interleaved accesses to D4 might close M2
296 prematurely, as might any I2C transfers part of M1->select.
299 auto-closing, the topology is fine.
302 Parent-locked mux as parent of mux-locked mux
303 ---------------------------------------------
307 .----------. .----------. .--------.
308 .--------. | parent- |-----| mux- |-----| dev D1 |
309 | root |--+--| locked | | locked | '--------'
310 '--------' | | mux M1 |--. | mux M2 |--. .--------.
311 | '----------' | '----------' '--| dev D2 |
312 | .--------. | .--------. '--------'
313 '--| dev D4 | '--| dev D3 |
314 '--------' '--------'
316 When D1 is accessed, accesses to D2 are locked out for the full
318 are locked). Accesses to D3 and D4 are possibly interleaved at
319 any point, just as is expected for mux-locked muxes.
321 When D3 or D4 are accessed, everything else is locked out. For D3
323 adapter is locked directly.
326 Two mux-locked sibling muxes
327 ----------------------------
331 .--------.
332 .----------. .--| dev D1 |
333 | mux- |--' '--------'
334 .--| locked | .--------.
335 | | mux M1 |-----| dev D2 |
336 | '----------' '--------'
337 | .----------. .--------.
338 .--------. | | mux- |-----| dev D3 |
339 | root |--+--| locked | '--------'
340 '--------' | | mux M2 |--. .--------.
341 | '----------' '--| dev D4 |
342 | .--------. '--------'
343 '--| dev D5 |
344 '--------'
346 When D1 is accessed, accesses to D2, D3 and D4 are locked out. But
350 Two parent-locked sibling muxes
351 -------------------------------
355 .--------.
356 .----------. .--| dev D1 |
357 | parent- |--' '--------'
358 .--| locked | .--------.
359 | | mux M1 |-----| dev D2 |
360 | '----------' '--------'
361 | .----------. .--------.
362 .--------. | | parent- |-----| dev D3 |
363 | root |--+--| locked | '--------'
364 '--------' | | mux M2 |--. .--------.
365 | '----------' '--| dev D4 |
366 | .--------. '--------'
367 '--| dev D5 |
368 '--------'
370 When any device is accessed, accesses to all other devices are locked
374 Mux-locked and parent-locked sibling muxes
375 ------------------------------------------
379 .--------.
380 .----------. .--| dev D1 |
381 | mux- |--' '--------'
382 .--| locked | .--------.
383 | | mux M1 |-----| dev D2 |
384 | '----------' '--------'
385 | .----------. .--------.
386 .--------. | | parent- |-----| dev D3 |
387 | root |--+--| locked | '--------'
388 '--------' | | mux M2 |--. .--------.
389 | '----------' '--| dev D4 |
390 | .--------. '--------'
391 '--| dev D5 |
392 '--------'
394 When D1 or D2 are accessed, accesses to D3 and D4 are locked out while
396 all other devices are locked out.