Lines Matching +full:cs +full:- +full:gpios
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-[0-9a-f])*$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
30 GPIOs used as chip selects.
32 increased automatically with max(cs-gpios, hardware chip selects).
34 So if, for example, the controller has 4 CS lines, and the
35 cs-gpios looks like this
36 cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
49 cs-gpio with the optional spi-cs-high flag for SPI slaves.
51 Each table entry defines how the CS pin is to be physically
54 device node | cs-gpio | CS pin state active | Note
56 spi-cs-high | - | H |
57 - | - | L |
58 spi-cs-high | ACTIVE_HIGH | H |
59 - | ACTIVE_HIGH | L | 1
60 spi-cs-high | ACTIVE_LOW | H | 2
61 - | ACTIVE_LOW | L |
68 because ACTIVE_LOW is overridden by spi-cs-high.
70 spi-cs-high + ACTIVE_HIGH.
72 num-cs:
77 spi-slave:
91 - compatible
94 "^.*@[0-9a-f]+$":
111 spi-3wire:
114 The device requires 3-wire mode.
116 spi-cpha:
121 spi-cpol:
126 spi-cs-high:
131 spi-lsb-first:
136 spi-max-frequency:
141 spi-rx-bus-width:
149 spi-rx-delay-us:
153 spi-tx-bus-width:
161 spi-tx-delay-us:
166 - compatible
167 - reg
170 - if:
173 - spi-slave
176 "#address-cells":
180 "#address-cells":
186 - |
188 #address-cells = <1>;
189 #size-cells = <0>;
190 compatible = "fsl,imx28-spi";
194 dma-names = "rx-tx";
198 spi-max-frequency = <1000000>;
204 spi-max-frequency = <100000>;