Lines Matching +full:de +full:- +full:asserted
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pratyush Yadav <p.yadav@ti.com>
13 - $ref: spi-controller.yaml#
18 - items:
19 - enum:
20 - ti,k2g-qspi
21 - ti,am654-ospi
22 - intel,lgm-qspi
23 - const: cdns,qspi-nor
24 - const: cdns,qspi-nor
28 - description: the controller register set
29 - description: the controller data area
37 cdns,fifo-depth:
44 cdns,fifo-width:
50 cdns,trigger-address:
53 32-bit indirect AHB trigger address.
55 cdns,is-decoded-cs:
61 cdns,rclk-en:
71 reset-names:
75 enum: [ qspi, qspi-ocp ]
79 "@[0-9a-f]+$":
85 cdns,read-delay:
90 cdns,tshsl-ns:
93 outputs are de-asserted between transactions.
95 cdns,tsd2d-ns:
97 Delay in nanoseconds between one chip select being de-activated
100 cdns,tchsh-ns:
105 cdns,tslch-ns:
111 - compatible
112 - reg
113 - interrupts
114 - clocks
115 - cdns,fifo-depth
116 - cdns,fifo-width
117 - cdns,trigger-address
118 - '#address-cells'
119 - '#size-cells'
124 - |
126 compatible = "cdns,qspi-nor";
127 #address-cells = <1>;
128 #size-cells = <0>;
133 cdns,fifo-depth = <128>;
134 cdns,fifo-width = <4>;
135 cdns,trigger-address = <0x00000000>;
137 reset-names = "qspi", "qspi-ocp";
140 compatible = "jedec,spi-nor";