Lines Matching full:description
24 description: The phandle of the mediatek topckgen controller
31 - description: 26M clock
32 - description: audio pll1 clock
33 - description: audio pll2 clock
34 - description: clock divider for i2si1_mck
35 - description: clock divider for i2si2_mck
36 - description: clock divider for i2so1_mck
37 - description: clock divider for i2so2_mck
38 - description: clock divider for dptx_mck
39 - description: a1sys hoping clock
40 - description: audio intbus clock
41 - description: audio hires clock
42 - description: audio local bus clock
43 - description: mux for dptx_mck
44 - description: mux for i2so1_mck
45 - description: mux for i2so2_mck
46 - description: mux for i2si1_mck
47 - description: mux for i2si2_mck
48 - description: audio infra 26M clock
49 - description: infra bus clock
76 description: Specify which input channel should be disabled.
81 description: Specify which input channel should be disabled.
85 description: Specify etdm in mclk output rate for always on case.
88 description: Specify etdm out mclk output rate for always on case.
92 description: if present, the etdm data mode is I2S.
96 description: if present, the etdm data mode is I2S.
100 description: |
111 description: |