Lines Matching +full:aoss +full:- +full:qmp

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Always-On Subsystem side channel binding
10   - Bjorn Andersson <bjorn.andersson@linaro.org>
14   requests to the always-on subsystem (AOSS), used for certain power management
16   SoC has it's own block of message RAM and IRQ for communication with the AOSS.
18   Messaging Protocol (QMP)
20   The AOSS side channel exposes control over a set of resources, used to control
23   power-domains.
28       - enum:
29           - qcom,sc7180-aoss-qmp
30           - qcom,sc7280-aoss-qmp
31           - qcom,sc8180x-aoss-qmp
32           - qcom,sdm845-aoss-qmp
33           - qcom,sm8150-aoss-qmp
34           - qcom,sm8250-aoss-qmp
35           - qcom,sm8350-aoss-qmp
36       - const: qcom,aoss-qmp
42       communication with the AOSS
47       Should specify the AOSS message IRQ for this client
55   "#clock-cells":
60   "#power-domain-cells":
63         The provided power-domains are:
68   - compatible
69   - reg
70   - interrupts
71   - mboxes
72   - "#clock-cells"
80       The AOSS side channel also provides the controls for three cooling devices,
81       these are expressed as subnodes of the QMP node. The name of the node is
85       "#cooling-cells":
89       - "#cooling-cells"
94   - |
95     #include <dt-bindings/interrupt-controller/arm-gic.h>
97     aoss_qmp: qmp@c300000 {
98       compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
103       #clock-cells = <0>;
104       #power-domain-cells = <1>;
107         #cooling-cells = <2>;
111         #cooling-cells = <2>;