Lines Matching +full:a +full:- +full:child +full:- +full:node +full:- +full:property
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
18 - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
19 - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
20 - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
21 - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
22 - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
23 - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
24 - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
25 - "samsung,exynos850-pinctrl": for Exynos850 compatible pin-controller.
27 - reg: Base address of the pin controller hardware module and length of
30 - reg: Second base address of the pin controller if the specific registers
33 Eg: GPF[1-5] of Exynos5433 are separated into the two base address.
34 - First base address is for GPAx and GPF[1-5] external interrupt
36 - Second base address is for GPF[1-5] pinctrl registers.
39 compatible = "samsung,exynos5433-pinctrl";
42 wakeup-interrupt-controller {
43 compatible = "samsung,exynos7-wakeup-eint";
48 - Pin banks as child nodes: Pin banks of the controller are represented by child
49 nodes of the controller node. Bank name is taken from name of the node. Each
50 bank node must contain following properties:
52 - gpio-controller: identifies the node as a gpio controller and pin bank.
53 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
58 <[phandle of the gpio controller node]
63 - Pin number: is a value between 0 to 7.
64 - Flags: 0 - Active High
65 1 - Active Low
67 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
69 as child nodes of the pin-controller node. There should be at least one
70 child node and there is no limit on the count of these child nodes. It is
71 also possible for a child node to consist of several further child nodes
73 level child nodes is exactly the same as for first level ones and is
76 The child node should contain a list of pin(s) on which a particular pin
78 list of pins is specified using the property name "samsung,pins". There
79 should be at least one pin specified for this property and there is no upper
83 as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
85 "[pin bank name]-[pin number within the bank]".
88 child node is specified using the "samsung,pin-function" property. The value
89 of this property that should be applied to each of the pins listed in the
90 "samsung,pins" property should be picked from the hardware manual of the SoC
91 for the specified pin group. This property is optional in the child node if
92 no specific function selection is desired for the pins listed in the child
93 node. The value of this property is used as-is to program the pin-controller
94 function selector register of the pin-bank.
96 The child node can also optionally specify one or more of the pin
98 "samsung,pins" property of the child node. The following pin configuration
101 - samsung,pin-val: Initial value of pin output buffer.
102 - samsung,pin-pud: Pull up/down configuration.
103 - samsung,pin-drv: Drive strength configuration.
104 - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
105 - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
108 hardware manual and these values are programmed as-is into the pin
109 pull up/down and driver strength register of the pin-controller.
111 Note: A child should include at least a pin function selection property or
112 pin configuration property (one or more) or both.
114 The client nodes that require a particular pin function selection and/or
115 pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
125 A. External GPIO Interrupts: For supporting external gpio interrupts, the
126 following properties should be specified in the pin-controller device node.
128 - interrupts: interrupt specifier for the controller. The format and value of
131 In addition, following properties must be present in node of every bank
134 - interrupt-controller: identifies the controller node as interrupt-parent.
135 - #interrupt-cells: the value of this property should be 2.
136 - First Cell: represents the external gpio interrupt number local to the
138 - Second Cell: flags to identify the type of the interrupt
139 - 1 = rising edge triggered
140 - 2 = falling edge triggered
141 - 3 = rising and falling edge triggered
142 - 4 = high level triggered
143 - 8 = low level triggered
145 B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
146 child node representing the external wakeup interrupt controller should be
147 included in the pin-controller device node.
149 Only one pin-controller device node can include external wakeup interrupts
150 child node (in other words, only one External Wakeup Interrupts
151 pin-controller is supported).
153 This child node should include following properties:
155 - compatible: identifies the type of the external wakeup interrupt controller
157 - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
159 - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
161 - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
163 - samsung,s5pv210-wakeup-eint: represents wakeup interrupt controller
165 - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
167 - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
169 - interrupts: interrupt used by multiplexed wakeup interrupts.
171 In addition, following properties must be present in node of every bank
172 of pins supporting wake-up interrupts:
174 - interrupt-controller: identifies the node as interrupt-parent.
175 - #interrupt-cells: the value of this property should be 2
176 - First Cell: represents the external wakeup interrupt number local to
178 - Second Cell: flags to identify the type of the interrupt
179 - 1 = rising edge triggered
180 - 2 = falling edge triggered
181 - 3 = rising and falling edge triggered
182 - 4 = high level triggered
183 - 8 = low level triggered
185 Node of every bank of pins supporting direct wake-up interrupts (without
188 - interrupts: interrupts of the interrupt parent which are used for external
194 All the pin controller nodes should be represented in the aliases node using
195 the following format 'pinctrl{n}' where n is a unique number for the alias.
197 Aliases for controllers compatible with "samsung,exynos7-pinctrl":
198 - pinctrl0: pin controller of ALIVE block,
199 - pinctrl1: pin controller of BUS0 block,
200 - pinctrl2: pin controller of NFC block,
201 - pinctrl3: pin controller of TOUCH block,
202 - pinctrl4: pin controller of FF block,
203 - pinctrl5: pin controller of ESE block,
204 - pinctrl6: pin controller of FSYS0 block,
205 - pinctrl7: pin controller of FSYS1 block,
206 - pinctrl8: pin controller of BUS1 block,
207 - pinctrl9: pin controller of AUDIO block,
209 Example: A pin-controller node with pin banks:
212 compatible = "samsung,exynos4210-pinctrl";
220 gpio-controller;
221 #gpio-cells = <2>;
226 /* Pin bank with external GPIO or muxed wake-up interrupts */
228 gpio-controller;
229 #gpio-cells = <2>;
231 interrupt-controller;
232 #interrupt-cells = <2>;
237 /* Pin bank with external direct wake-up interrupts */
239 gpio-controller;
240 #gpio-cells = <2>;
242 interrupt-controller;
243 interrupt-parent = <&gic>;
246 #interrupt-cells = <2>;
252 Example 1: A pin-controller node with pin groups.
254 #include <dt-bindings/pinctrl/samsung.h>
257 compatible = "samsung,exynos4210-pinctrl";
263 uart0_data: uart0-data {
264 samsung,pins = "gpa0-0", "gpa0-1";
265 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
266 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
267 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
270 uart0_fctl: uart0-fctl {
271 samsung,pins = "gpa0-2", "gpa0-3";
272 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
273 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
274 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
277 uart1_data: uart1-data {
278 samsung,pins = "gpa0-4", "gpa0-5";
279 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
280 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
281 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
284 uart1_fctl: uart1-fctl {
285 samsung,pins = "gpa0-6", "gpa0-7";
286 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
287 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
288 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
291 i2c2_bus: i2c2-bus {
292 samsung,pins = "gpa0-6", "gpa0-7";
293 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
294 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
295 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
298 sd4_bus8: sd4-bus-width8 {
299 part-1 {
300 samsung,pins = "gpk0-3", "gpk0-4",
301 "gpk0-5", "gpk0-6";
302 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
303 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
304 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
306 part-2 {
307 samsung,pins = "gpk1-3", "gpk1-4",
308 "gpk1-5", "gpk1-6";
309 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
310 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
311 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
316 Example 2: A pin-controller node with external wakeup interrupt controller node.
319 compatible = "samsung,exynos4210-pinctrl";
325 wakeup-interrupt-controller {
326 compatible = "samsung,exynos4210-wakeup-eint";
327 interrupt-parent = <&gic>;
332 Example 3: A uart client node that supports 'default' and 'flow-control' states.
335 compatible = "samsung,exynos4210-uart";
338 pinctrl-names = "default", "flow-control;
339 pinctrl-0 = <&uart0_data>;
340 pinctrl-1 = <&uart0_data>, <&uart0_fctl>;
350 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
353 Example 5: A display port client node that supports 'default' pinctrl state
356 display-port-controller {
359 samsung,hpd-gpio = <&gpx2 6 0>;
360 pinctrl-names = "default";
361 pinctrl-0 = <&dp_hpd>;
369 struct device *dev = &pdev->dev;
370 struct device_node *dp_node = dev->of_node;
374 hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
378 ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,