Lines Matching +full:pm8008 +full:- +full:gpio
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm660-gpio
21 - qcom,pm660l-gpio
22 - qcom,pm6150-gpio
23 - qcom,pm6150l-gpio
24 - qcom,pm7325-gpio
25 - qcom,pm8005-gpio
26 - qcom,pm8008-gpio
27 - qcom,pm8018-gpio
28 - qcom,pm8038-gpio
29 - qcom,pm8058-gpio
30 - qcom,pm8150-gpio
31 - qcom,pm8150b-gpio
32 - qcom,pm8350-gpio
33 - qcom,pm8350b-gpio
34 - qcom,pm8350c-gpio
35 - qcom,pm8916-gpio
36 - qcom,pm8917-gpio
37 - qcom,pm8921-gpio
38 - qcom,pm8941-gpio
39 - qcom,pm8950-gpio
40 - qcom,pm8994-gpio
41 - qcom,pm8998-gpio
42 - qcom,pma8084-gpio
43 - qcom,pmi8950-gpio
44 - qcom,pmi8994-gpio
45 - qcom,pmi8998-gpio
46 - qcom,pmk8350-gpio
47 - qcom,pmr735a-gpio
48 - qcom,pmr735b-gpio
49 - qcom,pms405-gpio
50 - qcom,pmx55-gpio
52 - enum:
53 - qcom,spmi-gpio
54 - qcom,ssbi-gpio
59 interrupt-controller: true
61 '#interrupt-cells':
64 gpio-controller: true
66 gpio-ranges:
69 '#gpio-cells':
72 The first cell will be used to define gpio number and the
73 second denotes the flags for this gpio
78 - compatible
79 - reg
80 - gpio-controller
81 - '#gpio-cells'
82 - gpio-ranges
83 - interrupt-controller
86 '-state$':
88 - $ref: "#/$defs/qcom-pmic-gpio-state"
89 - patternProperties:
91 $ref: "#/$defs/qcom-pmic-gpio-state"
94 qcom-pmic-gpio-state:
97 - $ref: "pinmux-node.yaml"
98 - $ref: "pincfg-node.yaml"
102 List of gpio pins affected by the properties specified in
104 - gpio1-gpio10 for pm6150
105 - gpio1-gpio12 for pm6150l
106 - gpio1-gpio10 for pm7325
107 - gpio1-gpio4 for pm8005
108 - gpio1-gpio2 for pm8008
109 - gpio1-gpio6 for pm8018
110 - gpio1-gpio12 for pm8038
111 - gpio1-gpio40 for pm8058
112 - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5,
114 - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4
116 - gpio1-gpio12 for pm8150l (hole on gpio7)
117 - gpio1-gpio4 for pm8916
118 - gpio1-gpio10 for pm8350
119 - gpio1-gpio8 for pm8350b
120 - gpio1-gpio9 for pm8350c
121 - gpio1-gpio38 for pm8917
122 - gpio1-gpio44 for pm8921
123 - gpio1-gpio36 for pm8941
124 - gpio1-gpio8 for pm8950 (hole on gpio3)
125 - gpio1-gpio22 for pm8994
126 - gpio1-gpio26 for pm8998
127 - gpio1-gpio22 for pma8084
128 - gpio1-gpio2 for pmi8950
129 - gpio1-gpio10 for pmi8994
130 - gpio1-gpio4 for pmk8350
131 - gpio1-gpio4 for pmr735a
132 - gpio1-gpio4 for pmr735b
133 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9
135 - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10
139 pattern: "^gpio([0-9]+)$"
143 - enum:
144 - normal
145 - paired
146 - func1
147 - func2
148 - dtest1
149 - dtest2
150 - dtest3
151 - dtest4
152 - func3 # supported by LV/MV GPIO subtypes
153 - func4 # supported by LV/MV GPIO subtypes
155 bias-disable: true
156 bias-pull-down: true
157 bias-pull-up: true
159 qcom,pull-up-strength:
164 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
169 bias-high-impedance: true
170 input-enable: true
171 output-high: true
172 output-low: true
173 power-source: true
175 qcom,drive-strength:
180 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
183 drive-push-pull: true
184 drive-open-drain: true
185 drive-open-source: true
187 qcom,analog-pass:
191 analog-pass-through mode.
196 Selects ATEST rail to route to GPIO when it's
197 configured in analog-pass-through mode.
200 qcom,dtest-buffer:
203 Selects DTEST rail to route to GPIO when it's
208 - pins
209 - function
214 - |
215 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
217 pm8921_gpio: gpio@150 {
218 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
220 interrupt-controller;
221 #interrupt-cells = <2>;
222 gpio-controller;
223 gpio-ranges = <&pm8921_gpio 0 0 44>;
224 #gpio-cells = <2>;
226 pm8921_gpio_keys: gpio-keys-state {
227 volume-keys {
231 input-enable;
232 bias-pull-up;
233 drive-push-pull;
234 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
235 power-source = <PM8921_GPIO_S4>;