Lines Matching +full:csi +full:- +full:2

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
10   - Heiko Stuebner <heiko@sntech.de>
13   The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP wich
14   connects to the ISP1 (Image Signal Processing unit v1.0) for CSI cameras.
19       - rockchip,px30-csi-dphy
20       - rockchip,rk1808-csi-dphy
21       - rockchip,rk3326-csi-dphy
22       - rockchip,rk3368-csi-dphy
30   clock-names:
33   '#phy-cells':
36   power-domains:
42       - description: exclusive PHY reset line
44   reset-names:
46       - const: apb
54   - compatible
55   - reg
56   - clocks
57   - clock-names
58   - '#phy-cells'
59   - power-domains
60   - resets
61   - reset-names
62   - rockchip,grf
67   - |
70         compatible = "rockchip,px30-csi-dphy";
73         clock-names = "pclk";
74         #phy-cells = <0>;
75         power-domains = <&power 1>;
77         reset-names = "apb";