Lines Matching +full:gcc +full:- +full:msm8996
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
24 - qcom,sdm660-qusb2-phy
25 - qcom,ipq6018-qusb2-phy
26 - qcom,sm4250-qusb2-phy
27 - qcom,sm6115-qusb2-phy
28 - items:
29 - enum:
30 - qcom,sc7180-qusb2-phy
31 - qcom,sdm845-qusb2-phy
32 - const: qcom,qusb2-v2-phy
36 "#phy-cells":
42 - description: phy config clock
43 - description: 19.2 MHz ref clk
44 - description: phy interface clock (Optional)
46 clock-names:
49 - const: cfg_ahb
50 - const: ref
51 - const: iface
53 vdda-pll-supply:
57 vdda-phy-dpdm-supply:
66 nvmem-cells:
72 qcom,tcsr-syscon:
81 const: qcom,qusb2-v2-phy
84 qcom,imp-res-offset-value:
94 qcom,bias-ctrl-value:
96 It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
103 qcom,charge-ctrl-value:
105 It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
112 qcom,hstx-trim-value:
116 Possible range is - 15mA to 24mA (stepsize of 600 uA).
117 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
123 qcom,preemphasis-level:
125 It is a 2 bit value that specifies pre-emphasis level.
127 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
133 qcom,preemphasis-width:
136 pre-emphasis (specified using qcom,preemphasis-level) must be in
137 effect. Duration could be half-bit of full-bit.
138 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
144 qcom,hsdisc-trim-value:
154 - compatible
155 - reg
156 - "#phy-cells"
157 - clocks
158 - clock-names
159 - vdda-pll-supply
160 - vdda-phy-dpdm-supply
161 - resets
166 - |
167 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
169 compatible = "qcom,msm8996-qusb2-phy";
171 #phy-cells = <0>;
173 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
174 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
175 clock-names = "cfg_ahb", "ref";
177 vdda-pll-supply = <&pm8994_l12>;
178 vdda-phy-dpdm-supply = <&pm8994_l24>;
180 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
181 nvmem-cells = <&qusb2p_hstx_trim>;