Lines Matching +full:rcar +full:- +full:gen3 +full:- +full:pcie +full:- +full:ep
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/
4 ---
5 $id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car PCIe Endpoint
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
17 - enum:
18 - renesas,r8a774a1-pcie-ep # RZ/G2M
19 - renesas,r8a774b1-pcie-ep # RZ/G2N
20 - renesas,r8a774c0-pcie-ep # RZ/G2E
21 - renesas,r8a774e1-pcie-ep # RZ/G2H
22 - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
27 reg-names:
29 - const: apb-base
30 - const: memory0
31 - const: memory1
32 - const: memory2
33 - const: memory3
39 power-domains:
48 clock-names:
50 - const: pcie
52 max-functions:
57 - compatible
58 - reg
59 - reg-names
60 - interrupts
61 - resets
62 - power-domains
63 - clocks
64 - clock-names
65 - max-functions
70 - |
71 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
72 #include <dt-bindings/interrupt-controller/arm-gic.h>
73 #include <dt-bindings/power/r8a774c0-sysc.h>
75 pcie0_ep: pcie-ep@fe000000 {
76 compatible = "renesas,r8a774c0-pcie-ep",
77 "renesas,rcar-gen3-pcie-ep";
83 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
88 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
90 clock-names = "pcie";
91 max-functions = /bits/ 8 <1>;