Lines Matching +full:sun8i +full:- +full:h3 +full:- +full:system +full:- +full:controller
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-4.00
30 - snps,dwmac-4.10a
31 - snps,dwmac-4.20a
32 - snps,dwmac-5.10a
33 - snps,dwxgmac
34 - snps,dwxgmac-2.10
37 - st,spear600-gmac
40 - compatible
50 - allwinner,sun7i-a20-gmac
51 - allwinner,sun8i-a83t-emac
52 - allwinner,sun8i-h3-emac
53 - allwinner,sun8i-r40-emac
54 - allwinner,sun8i-v3s-emac
55 - allwinner,sun50i-a64-emac
56 - loongson,ls2k-dwmac
57 - loongson,ls7a-dwmac
58 - amlogic,meson6-dwmac
59 - amlogic,meson8b-dwmac
60 - amlogic,meson8m2-dwmac
61 - amlogic,meson-gxbb-dwmac
62 - amlogic,meson-axg-dwmac
63 - loongson,ls2k-dwmac
64 - loongson,ls7a-dwmac
65 - ingenic,jz4775-mac
66 - ingenic,x1000-mac
67 - ingenic,x1600-mac
68 - ingenic,x1830-mac
69 - ingenic,x2000-mac
70 - rockchip,px30-gmac
71 - rockchip,rk3128-gmac
72 - rockchip,rk3228-gmac
73 - rockchip,rk3288-gmac
74 - rockchip,rk3328-gmac
75 - rockchip,rk3366-gmac
76 - rockchip,rk3368-gmac
77 - rockchip,rk3399-gmac
78 - rockchip,rv1108-gmac
79 - snps,dwmac
80 - snps,dwmac-3.40a
81 - snps,dwmac-3.50a
82 - snps,dwmac-3.610
83 - snps,dwmac-3.70a
84 - snps,dwmac-3.710
85 - snps,dwmac-4.00
86 - snps,dwmac-4.10a
87 - snps,dwmac-4.20a
88 - snps,dwmac-5.10a
89 - snps,dwxgmac
90 - snps,dwxgmac-2.10
99 - description: Combined signal for various interrupt events
100 - description: The interrupt to manage the remote wake-up packet detection
101 - description: The interrupt that occurs when Rx exits the LPI state
103 interrupt-names:
106 - const: macirq
107 - const: eth_wake_irq
108 - const: eth_lpi
115 - description: GMAC main clock
116 - description: Peripheral registers interface clock
117 - description:
119 Timestamp Addend Register. If not passed then the system
122 clock-names:
128 - stmmaceth
129 - pclk
130 - ptp_ref
137 reset-names:
140 mac-mode:
141 $ref: ethernet-controller.yaml#/properties/phy-connection-type
143 The property is identical to 'phy-mode', and assumes that there is mode
144 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
148 snps,axi-config:
159 * snps,fb, fixed-burst
160 * snps,mb, mixed-burst
163 snps,mtl-rx-config:
168 * snps,rx-queues-to-use, number of RX queues to be used in the
171 * snps,rx-sched-sp, Strict priority
172 * snps,rx-sched-wsp, Weighted Strict priority
175 * snps,dcb-algorithm, Queue to be enabled as DCB
176 * snps,avb-algorithm, Queue to be enabled as AVB
177 * snps,map-to-dma-channel, Channel to map
179 * snps,route-avcp, AV Untagged Control packets
180 * snps,route-ptp, PTP Packets
181 * snps,route-dcbcp, DCB Control Packets
182 * snps,route-up, Untagged Packets
183 * snps,route-multi-broad, Multicast & Broadcast Packets
187 snps,mtl-tx-config:
192 * snps,tx-queues-to-use, number of TX queues to be used in the
195 * snps,tx-sched-wrr, Weighted Round Robin
196 * snps,tx-sched-wfq, Weighted Fair Queuing
197 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
198 * snps,tx-sched-sp, Strict priority
203 * snps,dcb-algorithm, TX queue will be working in DCB
204 * snps,avb-algorithm, TX queue will be working in AVB
217 snps,reset-gpio:
223 snps,reset-active-low:
229 snps,reset-delays-us:
232 Triplet of delays. The 1st cell is reset pre-delay in micro
234 cell is reset post-delay in micro seconds.
241 Use Address-Aligned Beats
243 snps,fixed-burst:
248 snps,mixed-burst:
264 snps,en-tx-lpi-clockgating:
267 Enable gating of the MAC TX clock during TX low-power mode
269 snps,multicast-filter-bins:
275 snps,perfect-filter-entries:
281 snps,ps-speed:
295 const: snps,dwmac-mdio
298 - compatible
301 - compatible
302 - reg
303 - interrupts
304 - interrupt-names
305 - phy-mode
308 snps,reset-active-low: ["snps,reset-gpio"]
309 snps,reset-delay-us: ["snps,reset-gpio"]
312 - $ref: "ethernet-controller.yaml#"
313 - if:
318 - allwinner,sun7i-a20-gmac
319 - allwinner,sun8i-a83t-emac
320 - allwinner,sun8i-h3-emac
321 - allwinner,sun8i-r40-emac
322 - allwinner,sun8i-v3s-emac
323 - allwinner,sun50i-a64-emac
324 - ingenic,jz4775-mac
325 - ingenic,x1000-mac
326 - ingenic,x1600-mac
327 - ingenic,x1830-mac
328 - ingenic,x2000-mac
329 - snps,dwxgmac
330 - snps,dwxgmac-2.10
331 - st,spear600-gmac
355 snps,no-pbl-x8:
361 - if:
366 - allwinner,sun7i-a20-gmac
367 - allwinner,sun8i-a83t-emac
368 - allwinner,sun8i-h3-emac
369 - allwinner,sun8i-r40-emac
370 - allwinner,sun8i-v3s-emac
371 - allwinner,sun50i-a64-emac
372 - loongson,ls2k-dwmac
373 - loongson,ls7a-dwmac
374 - ingenic,jz4775-mac
375 - ingenic,x1000-mac
376 - ingenic,x1600-mac
377 - ingenic,x1830-mac
378 - ingenic,x2000-mac
379 - snps,dwmac-4.00
380 - snps,dwmac-4.10a
381 - snps,dwmac-4.20a
382 - snps,dwmac-5.10a
383 - snps,dwxgmac
384 - snps,dwxgmac-2.10
385 - st,spear600-gmac
398 - |
399 stmmac_axi_setup: stmmac-axi-config {
405 mtl_rx_setup: rx-queues-config {
406 snps,rx-queues-to-use = <1>;
407 snps,rx-sched-sp;
409 snps,dcb-algorithm;
410 snps,map-to-dma-channel = <0x0>;
415 mtl_tx_setup: tx-queues-config {
416 snps,tx-queues-to-use = <2>;
417 snps,tx-sched-wrr;
420 snps,dcb-algorithm;
425 snps,avb-algorithm;
435 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
437 interrupt-parent = <&vic1>;
439 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
440 mac-address = [000000000000]; /* Filled in by U-Boot */
441 max-frame-size = <3800>;
442 phy-mode = "gmii";
443 snps,multicast-filter-bins = <256>;
444 snps,perfect-filter-entries = <128>;
445 rx-fifo-depth = <16384>;
446 tx-fifo-depth = <16384>;
448 clock-names = "stmmaceth";
449 snps,axi-config = <&stmmac_axi_setup>;
450 snps,mtl-rx-config = <&mtl_rx_setup>;
451 snps,mtl-tx-config = <&mtl_tx_setup>;
453 #address-cells = <1>;
454 #size-cells = <0>;
455 compatible = "snps,dwmac-mdio";
456 phy1: ethernet-phy@0 {