Lines Matching +full:rx +full:- +full:internal +full:- +full:delay +full:- +full:ps
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-emac
19 - const: allwinner,sun8i-v3s-emac
20 - const: allwinner,sun50i-a64-emac
21 - items:
22 - enum:
23 - allwinner,sun20i-d1-emac
24 - allwinner,sun50i-h6-emac
25 - const: allwinner,sun50i-a64-emac
33 interrupt-names:
39 clock-names:
49 - compatible
50 - reg
51 - interrupts
52 - interrupt-names
53 - clocks
54 - clock-names
55 - resets
56 - reset-names
57 - phy-handle
58 - phy-mode
59 - syscon
62 - $ref: "snps,dwmac.yaml#"
63 - if:
68 - allwinner,sun8i-a83t-emac
69 - allwinner,sun8i-h3-emac
70 - allwinner,sun8i-v3s-emac
71 - allwinner,sun50i-a64-emac
75 allwinner,tx-delay-ps:
81 External RGMII PHY TX clock delay chain value in ps.
83 allwinner,rx-delay-ps:
89 External RGMII PHY TX clock delay chain value in ps.
91 - if:
96 - allwinner,sun8i-r40-emac
100 allwinner,rx-delay-ps:
106 External RGMII PHY TX clock delay chain value in ps.
108 - if:
113 - allwinner,sun8i-h3-emac
114 - allwinner,sun8i-v3s-emac
118 allwinner,leds-active-low:
123 mdio-mux:
128 const: allwinner,sun8i-h3-mdio-mux
130 mdio-parent-bus:
137 description: Internal MDIO Bus
140 "#address-cells":
143 "#size-cells":
147 const: allwinner,sun8i-h3-mdio-internal
153 "^ethernet-phy@[0-9a-f]$":
166 - clocks
167 - resets
175 "#address-cells":
178 "#size-cells":
185 - compatible
186 - mdio-parent-bus
187 - mdio@1
192 - |
194 compatible = "allwinner,sun8i-h3-emac";
198 interrupt-names = "macirq";
200 reset-names = "stmmaceth";
202 clock-names = "stmmaceth";
204 phy-handle = <&int_mii_phy>;
205 phy-mode = "mii";
206 allwinner,leds-active-low;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "snps,dwmac-mdio";
214 mdio-mux {
215 compatible = "allwinner,sun8i-h3-mdio-mux";
216 #address-cells = <1>;
217 #size-cells = <0>;
219 mdio-parent-bus = <&mdio1>;
222 compatible = "allwinner,sun8i-h3-mdio-internal";
224 #address-cells = <1>;
225 #size-cells = <0>;
227 ethernet-phy@1 {
231 phy-is-integrated;
237 #address-cells = <1>;
238 #size-cells = <0>;
243 - |
245 compatible = "allwinner,sun8i-h3-emac";
249 interrupt-names = "macirq";
251 reset-names = "stmmaceth";
253 clock-names = "stmmaceth";
255 phy-handle = <&ext_rgmii_phy>;
256 phy-mode = "rgmii";
257 allwinner,leds-active-low;
260 #address-cells = <1>;
261 #size-cells = <0>;
262 compatible = "snps,dwmac-mdio";
265 mdio-mux {
266 compatible = "allwinner,sun8i-h3-mdio-mux";
267 #address-cells = <1>;
268 #size-cells = <0>;
269 mdio-parent-bus = <&mdio2>;
272 compatible = "allwinner,sun8i-h3-mdio-internal";
274 #address-cells = <1>;
275 #size-cells = <0>;
277 ethernet-phy@1 {
286 #address-cells = <1>;
287 #size-cells = <0>;
289 ext_rgmii_phy: ethernet-phy@1 {
296 - |
298 compatible = "allwinner,sun8i-a83t-emac";
302 interrupt-names = "macirq";
304 reset-names = "stmmaceth";
306 clock-names = "stmmaceth";
307 phy-handle = <&ext_rgmii_phy1>;
308 phy-mode = "rgmii";
311 compatible = "snps,dwmac-mdio";
312 #address-cells = <1>;
313 #size-cells = <0>;
315 ext_rgmii_phy1: ethernet-phy@1 {