Lines Matching +full:0 +full:x54

50             <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
51             <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
56         mux-controls = <&mux1 0>;
59         #size-cells = <0>;
61         mdio@0 {
62             reg = <0x0>;
64             #size-cells = <0>;
68             reg = <0x8>;
70             #size-cells = <0>;
79         #size-cells = <0>;
81         mdio@0 {
82             reg = <0x0>;
84             #size-cells = <0>;
88             reg = <0x1>;
90             #size-cells = <0>;
100         reg = <0x1000 0x100>;
107                 <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
108                 <0x3 0x40>; /* 1: reg 0x3, bit 6 */
109             idle-states = <MUX_IDLE_AS_IS>, <0>;
115         mux-controls = <&mux2 0>;
117         #size-cells = <0>;
121             #size-cells = <0>;
123             /* inputs 0..3 */
124             port@0 {
125                 reg = <0>;