Lines Matching +full:bank +full:- +full:width
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
19 - items:
20 - enum:
21 - amd,s29gl01gp
22 - amd,s29gl032a
23 - amd,s29gl256n
24 - amd,s29gl512n
25 - arm,versatile-flash
26 - arm,vexpress-flash
27 - cortina,gemini-flash
28 - cypress,hyperflash
29 - ge,imp3a-firmware-mirror
30 - ge,imp3a-paged-flash
31 - gef,ppc9a-firmware-mirror
32 - gef,ppc9a-paged-flash
33 - gef,sbc310-firmware-mirror
34 - gef,sbc310-paged-flash
35 - gef,sbc610-firmware-mirror
36 - gef,sbc610-paged-flash
37 - intel,28f128j3
38 - intel,dt28f160
39 - intel,ixp4xx-flash
40 - intel,JS28F128
41 - intel,JS28F640
42 - intel,PC28F640P30T85
43 - numonyx,js28f00a
44 - numonyx,js28f128
45 - sst,sst39vf320
46 - xlnx,xps-mch-emc-2.00.a
47 - const: cfi-flash
48 - items:
49 - enum:
50 - cypress,cy7c1019dv33-10zsxi
51 - arm,vexpress-psram
52 - const: mtd-ram
53 - enum:
54 - cfi-flash
55 - jedec-flash
56 - mtd-ram
57 - mtd-rom
62 non-identical chips can be described in one node.
66 bank-width:
67 description: Width (in bytes) of the bank. Equal to the device width times
72 device-width:
74 Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
78 no-unaligned-direct-access:
86 "no-unaligned-direct-access", the flash will not be exposed directly to
89 linux,mtd-name:
91 Allows specifying the mtd name for retro capability with physmap-flash
93 physmap-flash.
96 use-advanced-sector-protection:
99 Enables support for the advanced sector protection (Spansion: PPB -
102 erase-size:
106 addr-gpios:
113 '#address-cells':
116 '#size-cells':
119 big-endian: true
120 little-endian: true
123 '@[0-9a-f]+$':
127 - compatible
128 - reg
134 - |
137 compatible = "cfi-flash";
139 bank-width = <4>;
140 device-width = <1>;
142 #address-cells = <1>;
143 #size-cells = <1>;
153 read-only;
157 - |
161 compatible = "intel,PC28F640P30T85", "cfi-flash";
164 bank-width = <2>;
166 #address-cells = <1>;
167 #size-cells = <1>;
171 label = "test-part1";
176 - |
179 #address-cells = <2>;
180 #size-cells = <1>;
183 compatible = "mtd-ram";
185 bank-width = <2>;
189 - |
190 /* An example using addr-gpios */
191 #include <dt-bindings/gpio/gpio.h>
194 compatible = "cfi-flash";
196 bank-width = <2>;
197 addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
199 #address-cells = <1>;
200 #size-cells = <1>;
205 label = "test-part1";