Lines Matching +full:omap +full:- +full:sub +full:- +full:mailbox
1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI OMAP2+ and K3 Mailbox devices
10 - Suman Anna <s-anna@ti.com>
13 The OMAP Mailbox hardware facilitates communication between different
14 processors using a queued mailbox interrupt mechanism. The IP block is
19 Each mailbox IP block/cluster has a certain number of h/w fifo queues and
32 registers. All the current OMAP SoCs except for the newest DRA7xx SoC has a
35 lines can also be routed to different processor sub-systems on DRA7xx as they
46 Mailbox Controller Nodes
48 A Mailbox device node is used to represent a Mailbox IP instance/cluster
49 within a SoC. The sub-mailboxes (actual communication channels) are
52 Mailbox Users
55 them using the common mailbox binding properties, "mboxes" and the optional
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
58 the mailbox controller device node and an args specifier that will be the
59 phandle to the intended sub-mailbox child node to be used for communication.
60 The equivalent "mbox-names" property value can be used to give a name to the
64 omap-mbox-descriptor:
65 $ref: /schemas/types.yaml#/definitions/uint32-array
67 The omap-mbox-descriptor is made of up of 3 cells and represents a single
68 uni-directional communication channel. A typical sub-mailbox device uses
69 two such channels - one for transmitting (Tx) and one for receiving (Rx).
71 - description:
72 mailbox fifo id used either for transmitting on ti,mbox-tx channel or
73 for receiving on ti,mbox-rx channel (fifo_id). This is the hardware
74 fifo number within a mailbox cluster.
75 - description:
81 - description:
82 mailbox user id for identifying the interrupt line associated with
84 user id number within a mailbox cluster.
86 omap-sub-mailbox:
89 The omap-sub-mailbox is a child node within a Mailbox controller device
92 child node should have a unique node name across all the different mailbox
96 ti,mbox-tx:
97 $ref: "#/$defs/omap-mbox-descriptor"
98 description: sub-mailbox descriptor property defining a Tx fifo.
100 ti,mbox-rx:
101 $ref: "#/$defs/omap-mbox-descriptor"
102 description: sub-mailbox descriptor property defining a Rx fifo.
104 ti,mbox-send-noirq:
107 Quirk flag to allow the client user of this sub-mailbox to send
109 the Tx ticker. Should be used only on sub-mailboxes used to
113 - ti,mbox-tx
114 - ti,mbox-rx
119 - ti,omap2-mailbox # for OMAP2420, OMAP2430 SoCs
120 - ti,omap3-mailbox # for OMAP3430, OMAP3630 SoCs
121 - ti,omap4-mailbox # for OMAP44xx, OMAP54xx, AM33xx, AM43xx and DRA7xx SoCs
122 - ti,am654-mailbox # for K3 AM65x, J721E and J7200 SoCs
123 - ti,am64-mailbox # for K3 AM64x SoCs
130 Contains the interrupt information for the mailbox device. The format is
131 dependent on which interrupt controller the Mailbox device uses. The
133 ti,mbox-num-users property, but is usually limited by the number of
134 interrupts reaching the main processor. An interrupt-parent property
138 "#mbox-cells":
141 The specifier is a phandle to an omap-sub-mailbox device.
143 ti,mbox-num-users:
146 Number of targets (processor devices) that the mailbox device can
149 ti,mbox-num-fifos:
151 description: Number of h/w fifo queues within the mailbox IP block.
157 Name of the hwmod associated with the mailbox. This should be defined
158 in the mailbox node only if the node is not defined as a child node of
161 This property is only needed on some legacy OMAP SoCs which have not
166 "^mbox-[a-z0-9-]+$":
167 $ref: "#/$defs/omap-sub-mailbox"
170 - compatible
171 - reg
172 - interrupts
173 - "#mbox-cells"
174 - ti,mbox-num-users
175 - ti,mbox-num-fifos
178 - if:
182 - ti,am654-mailbox
185 - interrupt-parent
187 - if:
191 - ti,am654-mailbox
192 - ti,am64-mailbox
195 ti,mbox-num-users:
197 ti,mbox-num-fifos:
203 - if:
207 - ti,omap4-mailbox
210 ti,mbox-num-users:
212 ti,mbox-num-fifos:
218 - if:
222 - ti,omap3-mailbox
225 ti,mbox-num-users:
227 ti,mbox-num-fifos:
233 - if:
237 - ti,omap2-mailbox
240 ti,mbox-num-users:
242 ti,mbox-num-fifos:
251 - |
253 #include <dt-bindings/interrupt-controller/arm-gic.h>
254 mailbox: mailbox@4a0f4000 {
255 compatible = "ti,omap4-mailbox";
258 #mbox-cells = <1>;
259 ti,mbox-num-users = <3>;
260 ti,mbox-num-fifos = <8>;
262 mbox_ipu: mbox-ipu {
263 ti,mbox-tx = <0 0 0>;
264 ti,mbox-rx = <1 0 0>;
266 mbox_dsp: mbox-dsp {
267 ti,mbox-tx = <3 0 0>;
268 ti,mbox-rx = <2 0 0>;
273 mboxes = <&mailbox &mbox_dsp>;
276 - |
278 mailbox1: mailbox@480c8000 {
279 compatible = "ti,omap4-mailbox";
282 #mbox-cells = <1>;
283 ti,mbox-num-users = <4>;
284 ti,mbox-num-fifos = <8>;
286 mbox_wkupm3: mbox-wkup-m3 {
287 ti,mbox-tx = <0 0 0>;
288 ti,mbox-rx = <0 0 3>;
289 ti,mbox-send-noirq;
293 - |
295 mailbox0_cluster0: mailbox@31f80000 {
296 compatible = "ti,am654-mailbox";
298 #mbox-cells = <1>;
299 ti,mbox-num-users = <4>;
300 ti,mbox-num-fifos = <16>;
301 interrupt-parent = <&intr_main_navss>;
304 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
305 ti,mbox-tx = <1 0 0>;
306 ti,mbox-rx = <0 0 0>;