Lines Matching +full:ddc +full:- +full:i2c +full:- +full:bus
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - rockchip,rk3228-dw-hdmi
23 - rockchip,rk3288-dw-hdmi
24 - rockchip,rk3328-dw-hdmi
25 - rockchip,rk3399-dw-hdmi
27 reg-io-width:
33 - {}
34 - {}
37 - description: The HDMI CEC controller main clock
38 - description: Power for GRF IO
39 - description: External clock for some HDMI PHY
41 clock-names:
44 - {}
45 - {}
46 - enum:
47 - cec
48 - grf
49 - vpll
50 - enum:
51 - grf
52 - vpll
53 - const: vpll
55 ddc-i2c-bus:
58 The HDMI DDC bus can be connected to either a system I2C master or the
59 functionally-reduced I2C master contained in the DWC HDMI. When connected
60 to a system I2C master this property contains a phandle to that I2C
67 phy-names:
70 pinctrl-names:
72 The unwedge pinctrl entry shall drive the DDC SDA line low. This is
73 intended to work around a hardware errata that can cause the DDC I2C
74 bus to be wedged.
76 - const: default
77 - const: unwedge
84 $ref: /schemas/graph.yaml#/$defs/port-base
98 - endpoint@0
99 - endpoint@1
102 - port
110 - compatible
111 - reg
112 - reg-io-width
113 - clocks
114 - clock-names
115 - interrupts
116 - ports
117 - rockchip,grf
122 - |
123 #include <dt-bindings/clock/rk3288-cru.h>
124 #include <dt-bindings/interrupt-controller/arm-gic.h>
125 #include <dt-bindings/interrupt-controller/irq.h>
128 compatible = "rockchip,rk3288-dw-hdmi";
130 reg-io-width = <4>;
131 ddc-i2c-bus = <&i2c5>;
135 clock-names = "iahb", "isfr";
139 #address-cells = <1>;
140 #size-cells = <0>;
144 remote-endpoint = <&vopb_out_hdmi>;
148 remote-endpoint = <&vopl_out_hdmi>;