Lines Matching +full:mt8173 +full:- +full:hdmi +full:- +full:ddc

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek HDMI Encoder Device Tree Bindings
10   - CK Hu <ck.hu@mediatek.com>
11   - Jitao shi <jitao.shi@mediatek.com>
14   The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
20       - mediatek,mt2701-hdmi
21       - mediatek,mt7623-hdmi
22       - mediatek,mt8167-hdmi
23       - mediatek,mt8173-hdmi
33       - description: Pixel Clock
34       - description: HDMI PLL
35       - description: Bit Clock
36       - description: S/PDIF Clock
38   clock-names:
40       - const: pixel
41       - const: pll
42       - const: bclk
43       - const: spdif
48   phy-names:
50       - const: hdmi
52   mediatek,syscon-hdmi:
53     $ref: '/schemas/types.yaml#/definitions/phandle-array'
71           node that contains a ddc-i2c-bus property, or to the  input port of an attached
75       - port@0
76       - port@1
79   - compatible
80   - reg
81   - interrupts
82   - clocks
83   - clock-names
84   - phys
85   - phy-names
86   - mediatek,syscon-hdmi
87   - ports
92   - |
93     #include <dt-bindings/clock/mt8173-clk.h>
94     #include <dt-bindings/interrupt-controller/arm-gic.h>
95     #include <dt-bindings/interrupt-controller/irq.h>
96     hdmi0: hdmi@14025000 {
97         compatible = "mediatek,mt8173-hdmi";
104         clock-names = "pixel", "pll", "bclk", "spdif";
105         pinctrl-names = "default";
106         pinctrl-0 = <&hdmi_pin>;
108         phy-names = "hdmi";
109         mediatek,syscon-hdmi = <&mmsys 0x900>;
112           #address-cells = <1>;
113           #size-cells = <0>;
119               remote-endpoint = <&dpi0_out>;
127               remote-endpoint = <&hdmi_con_in>;