Lines Matching +full:clock +full:- +full:tree

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13   This document defines device tree properties for the Synopsys DesignWare HDMI
14   TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
15   binding specification by itself but is meant to be referenced by device tree
16   bindings for the platform-specific integrations of the DWC HDMI TX.
18   When referenced from platform device tree bindings the properties defined in
19   this document are defined as follows. The platform device tree bindings are
26   reg-io-width:
30       - $ref: /schemas/types.yaml#/definitions/uint32
31       - enum: [1, 4]
38       - description: The bus clock for either AHB and APB
39       - description: The internal register configuration clock
42   clock-names:
46       - const: iahb
47       - const: isfr