Lines Matching +full:gcc +full:- +full:sc7280
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <tdas@codeaurora.org>
17 dt-bindings/clock/qcom,gpucc-sdm845.h
18 dt-bindings/clock/qcom,gpucc-sc7180.h
19 dt-bindings/clock/qcom,gpucc-sc7280.h
20 dt-bindings/clock/qcom,gpucc-sm8150.h
21 dt-bindings/clock/qcom,gpucc-sm8250.h
26 - qcom,sdm845-gpucc
27 - qcom,sc7180-gpucc
28 - qcom,sc7280-gpucc
29 - qcom,sc8180x-gpucc
30 - qcom,sm8150-gpucc
31 - qcom,sm8250-gpucc
35 - description: Board XO source
36 - description: GPLL0 main branch source
37 - description: GPLL0 div branch source
39 clock-names:
41 - const: bi_tcxo
42 - const: gcc_gpu_gpll0_clk_src
43 - const: gcc_gpu_gpll0_div_clk_src
45 '#clock-cells':
48 '#reset-cells':
51 '#power-domain-cells':
58 - compatible
59 - reg
60 - clocks
61 - clock-names
62 - '#clock-cells'
63 - '#reset-cells'
64 - '#power-domain-cells'
69 - |
70 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
71 #include <dt-bindings/clock/qcom,rpmh.h>
72 clock-controller@5090000 {
73 compatible = "qcom,sdm845-gpucc";
76 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
77 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
78 clock-names = "bi_tcxo",
81 #clock-cells = <1>;
82 #reset-cells = <1>;
83 #power-domain-cells = <1>;