Lines Matching +full:external +full:- +full:memory +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nvidia,tegra124-car.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Clock and Reset Controller
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
20 CLKGEN input signals include the external clock for the reference frequency
21 (12 MHz, 26 MHz) and the external clock for the Real Time Clock (32.768 KHz).
30 const: nvidia,tegra124-car
35 '#clock-cells':
38 "#reset-cells":
41 nvidia,external-memory-controller:
44 phandle of the external memory controller node
47 "^emc-timings-[0-9]+$":
50 nvidia,ram-code:
57 "^timing-[0-9]+$":
60 clock-frequency:
62 external memory clock rate in Hz
66 nvidia,parent-clock-frequency:
75 - description: parent clock of EMC
77 clock-names:
79 - const: emc-parent
82 - clock-frequency
83 - nvidia,parent-clock-frequency
84 - clocks
85 - clock-names
92 - compatible
93 - reg
94 - '#clock-cells'
95 - "#reset-cells"
100 - |
101 #include <dt-bindings/clock/tegra124-car.h>
103 car: clock-controller@60006000 {
104 compatible = "nvidia,tegra124-car";
106 #clock-cells = <1>;
107 #reset-cells = <1>;
110 usb-controller@c5004000 {
111 compatible = "nvidia,tegra20-ehci";