Lines Matching +full:mt7621 +full:- +full:sysc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MT7621 Clock Device Tree Bindings
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
13 The MT7621 has a PLL controller from where the cpu clock is provided
21 [1]: <include/dt-bindings/clock/mt7621-clk.h>.
28 - const: mediatek,mt7621-sysc
29 - const: syscon
34 "#clock-cells":
45 clock-output-names:
49 - compatible
50 - reg
51 - '#clock-cells'
52 - ralink,memctl
57 - |
58 #include <dt-bindings/clock/mt7621-clk.h>
60 sysc: sysc@0 {
61 compatible = "mediatek,mt7621-sysc", "syscon";
63 #clock-cells = <1>;
65 clock-output-names = "xtal", "cpu", "bus",