Lines Matching full:l2
3 …L2 XQ rejects due to a full or near full condition which likely indicates back pressure from the I…
9 … "BriefDescription": "Counts the number of request from the L2 that were not accepted into the XQ"
12 … eviction when the address conflicts incoming external snoops. (Note that L2 prefetcher requests …
21 …his event counts requests originating from the core that references a cache line in the L2 cache.",
27 "BriefDescription": "L2 cache requests from this core"
30 …licDescription": "This event counts the total number of L2 cache references and the number of L2 c…
36 "BriefDescription": "L2 cache request misses"
132 "PublicDescription": "This event counts the number of load ops retired that hit in the L2.",
138 "BriefDescription": "Loads hit L2"
142 … "PublicDescription": "This event counts the number of load ops retired that miss in the L2.",
148 "BriefDescription": "Loads missed L2"
204 "BriefDescription": "Counts any code reads (demand & prefetch) that miss L2.",
226 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 and the snoops to sibl…
237 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 with a snoop miss resp…
259 "BriefDescription": "Counts any rfo reads (demand & prefetch) that miss L2.",
281 …"BriefDescription": "Counts any rfo reads (demand & prefetch) that miss L2 and the snoops to sibli…
292 …"BriefDescription": "Counts any rfo reads (demand & prefetch) that miss L2 with a snoop miss respo…
314 "BriefDescription": "Counts any data read (demand & prefetch) that miss L2.",
336 …"BriefDescription": "Counts any data read (demand & prefetch) that miss L2 and the snoops to sibli…
347 …"BriefDescription": "Counts any data read (demand & prefetch) that miss L2 with a snoop miss respo…
369 "BriefDescription": "Counts streaming store that miss L2.",
391 …"BriefDescription": "Counts any request that miss L2 and the snoops to sibling cores hit in either…
402 "BriefDescription": "Counts any request that miss L2 with a snoop miss response.",
424 "BriefDescription": "Counts DCU hardware prefetcher data read that miss L2.",
446 …"BriefDescription": "Counts DCU hardware prefetcher data read that miss L2 and the snoops to sibli…
457 …"BriefDescription": "Counts DCU hardware prefetcher data read that miss L2 with a snoop miss respo…
479 … "BriefDescription": "Countsof demand RFO requests to write to partial cache lines that miss L2.",
490 …riefDescription": "Counts demand reads of partial cache lines (including UC and WC) that miss L2.",
501 "BriefDescription": "Counts code reads generated by L2 prefetchers that miss L2.",
512 …"BriefDescription": "Counts code reads generated by L2 prefetchers that miss L2 and the snoops to …
523 …"BriefDescription": "Counts code reads generated by L2 prefetchers that miss L2 with a snoop miss …
534 "BriefDescription": "Counts RFO requests generated by L2 prefetchers that miss L2.",
545 …"BriefDescription": "Counts RFO requests generated by L2 prefetchers that hit in the other module …
556 …"BriefDescription": "Counts RFO requests generated by L2 prefetchers that miss L2 and the snoops t…
567 …"BriefDescription": "Counts RFO requests generated by L2 prefetchers that miss L2 with a snoop mis…
578 "BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that miss L2.",
589 …"BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that hit in the other…
600 …"BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that miss L2 and the …
611 …"BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that miss L2 with a s…
622 "BriefDescription": "Counts writeback (modified to exclusive) that miss L2.",
633 …"BriefDescription": "Counts writeback (modified to exclusive) that miss L2 with no details on snoo…
644 …uction cacheline that are are outstanding, per cycle, from the time of the L2 miss to when any res…
655 "BriefDescription": "Counts demand and DCU prefetch instruction cacheline that miss L2.",
666 …"BriefDescription": "Counts demand and DCU prefetch instruction cacheline that miss L2 and the sno…
677 …"BriefDescription": "Counts demand and DCU prefetch instruction cacheline that miss L2 with a snoo…
699 …CU prefetch RFOs that are are outstanding, per cycle, from the time of the L2 miss to when any res…
710 "BriefDescription": "Counts demand and DCU prefetch RFOs that miss L2.",
732 …"BriefDescription": "Counts demand and DCU prefetch RFOs that miss L2 and the snoops to sibling co…
743 …"BriefDescription": "Counts demand and DCU prefetch RFOs that miss L2 with a snoop miss response.",
754 …efetch data read that are are outstanding, per cycle, from the time of the L2 miss to when any res…
765 "BriefDescription": "Counts demand and DCU prefetch data read that miss L2.",
787 …"BriefDescription": "Counts demand and DCU prefetch data read that miss L2 and the snoops to sibli…
798 …"BriefDescription": "Counts demand and DCU prefetch data read that miss L2 with a snoop miss respo…