Lines Matching full:counts

3 …"PublicDescription": "This event counts the number of demand and prefetch transactions that the L2…
9 …  "BriefDescription": "Counts the number of request from the L2 that were not accepted into the XQ"
12 …Counts the number of (demand and L1 prefetchers) core requests rejected by the L2Q due to a full o…
18 …"BriefDescription": "Counts the number of request that were not accepted into the L2Q because the …
21 …"PublicDescription": "This event counts requests originating from the core that references a cache…
30 …"PublicDescription": "This event counts the total number of L2 cache references and the number of …
39 …"PublicDescription": "Counts cycles that fetch is stalled due to an outstanding ICache miss. That …
49 …"PublicDescription": "This event counts the number of retired loads that were prohibited from rece…
58 …"PublicDescription": "This event counts the cases where a forward was technically possible, but di…
67 …"PublicDescription": "This event counts the number of retire stores that experienced cache line bo…
77 …"PublicDescription": "This event counts the number of retire loads that experienced cache line bou…
86 …"PublicDescription": "This event counts the number of retired memory operations with lock semantic…
95 …"PublicDescription": "This event counts the number of retired stores that are delayed because ther…
104         "PublicDescription": "This event counts the number of load uops reissued from Rehabq.",
113         "PublicDescription": "This event counts the number of store uops reissued from Rehabq.",
122 …"PublicDescription": "This event counts the number of load ops retired that miss in L1 Data cache.…
132         "PublicDescription": "This event counts the number of load ops retired that hit in the L2.",
142 …      "PublicDescription": "This event counts the number of load ops retired that miss in the L2.",
151         "PublicDescription": "This event counts the number of load ops retired that had UTLB miss.",
161 …"PublicDescription": "This event counts the number of load ops retired that got data from the othe…
170         "PublicDescription": "This event counts the number of load ops retired.",
179         "PublicDescription": "This event counts the number of store ops retired.",
204         "BriefDescription": "Counts any code reads (demand & prefetch) that miss L2.",
215 …"BriefDescription": "Counts any code reads (demand & prefetch) that hit in the other module where …
226 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 and the snoops to sibl…
237 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 with a snoop miss resp…
248 …      "BriefDescription": "Counts any code reads (demand & prefetch) that have any response type.",
259         "BriefDescription": "Counts any rfo reads (demand & prefetch) that miss L2.",
270 …"BriefDescription": "Counts any rfo reads (demand & prefetch) that hit in the other module where m…
281 …"BriefDescription": "Counts any rfo reads (demand & prefetch) that miss L2 and the snoops to sibli…
292 …"BriefDescription": "Counts any rfo reads (demand & prefetch) that miss L2 with a snoop miss respo…
303         "BriefDescription": "Counts any rfo reads (demand & prefetch) that have any response type.",
314         "BriefDescription": "Counts any data read (demand & prefetch) that miss L2.",
325 …"BriefDescription": "Counts any data read (demand & prefetch) that hit in the other module where m…
336 …"BriefDescription": "Counts any data read (demand & prefetch) that miss L2 and the snoops to sibli…
347 …"BriefDescription": "Counts any data read (demand & prefetch) that miss L2 with a snoop miss respo…
358         "BriefDescription": "Counts any data read (demand & prefetch) that have any response type.",
369         "BriefDescription": "Counts streaming store that miss L2.",
380 …"BriefDescription": "Counts any request that hit in the other module where modified copies were fo…
391 …"BriefDescription": "Counts any request that miss L2 and the snoops to sibling cores hit in either…
402         "BriefDescription": "Counts any request that miss L2 with a snoop miss response.",
413         "BriefDescription": "Counts any request that have any response type.",
424         "BriefDescription": "Counts DCU hardware prefetcher data read that miss L2.",
435 …"BriefDescription": "Counts DCU hardware prefetcher data read that hit in the other module where m…
446 …"BriefDescription": "Counts DCU hardware prefetcher data read that miss L2 and the snoops to sibli…
457 …"BriefDescription": "Counts DCU hardware prefetcher data read that miss L2 with a snoop miss respo…
468         "BriefDescription": "Counts DCU hardware prefetcher data read that have any response type.",
490 …"BriefDescription": "Counts demand reads of partial cache lines (including UC and WC) that miss L2…
501         "BriefDescription": "Counts code reads generated by L2 prefetchers that miss L2.",
512 …"BriefDescription": "Counts code reads generated by L2 prefetchers that miss L2 and the snoops to …
523 …"BriefDescription": "Counts code reads generated by L2 prefetchers that miss L2 with a snoop miss …
534         "BriefDescription": "Counts RFO requests generated by L2 prefetchers that miss L2.",
545 …"BriefDescription": "Counts RFO requests generated by L2 prefetchers that hit in the other module …
556 …"BriefDescription": "Counts RFO requests generated by L2 prefetchers that miss L2 and the snoops t…
567 …"BriefDescription": "Counts RFO requests generated by L2 prefetchers that miss L2 with a snoop mis…
578         "BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that miss L2.",
589 …"BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that hit in the other…
600 …"BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that miss L2 and the …
611 …"BriefDescription": "Counts data cacheline reads generated by L2 prefetchers that miss L2 with a s…
622         "BriefDescription": "Counts writeback (modified to exclusive) that miss L2.",
633 …"BriefDescription": "Counts writeback (modified to exclusive) that miss L2 with no details on snoo…
644 …"BriefDescription": "Counts demand and DCU prefetch instruction cacheline that are are outstanding…
655         "BriefDescription": "Counts demand and DCU prefetch instruction cacheline that miss L2.",
666 …"BriefDescription": "Counts demand and DCU prefetch instruction cacheline that miss L2 and the sno…
677 …"BriefDescription": "Counts demand and DCU prefetch instruction cacheline that miss L2 with a snoo…
688 …"BriefDescription": "Counts demand and DCU prefetch instruction cacheline that have any response t…
699 …"BriefDescription": "Counts demand and DCU prefetch RFOs that are are outstanding, per cycle, from…
710         "BriefDescription": "Counts demand and DCU prefetch RFOs that miss L2.",
721 …"BriefDescription": "Counts demand and DCU prefetch RFOs that hit in the other module where modifi…
732 …"BriefDescription": "Counts demand and DCU prefetch RFOs that miss L2 and the snoops to sibling co…
743 …"BriefDescription": "Counts demand and DCU prefetch RFOs that miss L2 with a snoop miss response.",
754 …"BriefDescription": "Counts demand and DCU prefetch data read that are are outstanding, per cycle,…
765         "BriefDescription": "Counts demand and DCU prefetch data read that miss L2.",
776 …"BriefDescription": "Counts demand and DCU prefetch data read that hit in the other module where m…
787 …"BriefDescription": "Counts demand and DCU prefetch data read that miss L2 and the snoops to sibli…
798 …"BriefDescription": "Counts demand and DCU prefetch data read that miss L2 with a snoop miss respo…
809         "BriefDescription": "Counts demand and DCU prefetch data read that have any response type.",