Lines Matching +full:0 +full:- +full:6
4 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
6 "UMask": "0x1",
10 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event"
15 …R) feature to mitigate some bias in how retired instructions get sampled. Use on Fixed Counter 0.",
17 "UMask": "0x1",
27 "UMask": "0x2",
37 "UMask": "0x3",
45 …-on-Store blocking code preventing store forwarding. This includes cases when: a. preceding store …
46 "EventCode": "0x03",
47 "Counter": "0,1,2,3",
48 "UMask": "0x2",
49 "PEBScounters": "0,1,2,3",
57 "EventCode": "0x03",
58 "Counter": "0,1,2,3",
59 "UMask": "0x8",
60 "PEBScounters": "0,1,2,3",
68 "EventCode": "0x07",
69 "Counter": "0,1,2,3",
70 "UMask": "0x1",
71 "PEBScounters": "0,1,2,3",
79 "EventCode": "0x0D",
80 "Counter": "0,1,2,3,4,5,6,7",
81 "UMask": "0x1",
82 "PEBScounters": "0,1,2,3,4,5,6,7",
89 …"PublicDescription": "Counts cycles the Backend cluster is recovering after a miss-speculation or …
90 "EventCode": "0x0D",
91 "Counter": "0,1,2,3,4,5,6,7",
92 "UMask": "0x3",
93 "PEBScounters": "0,1,2,3,4,5,6,7",
96 …"BriefDescription": "Cycles the Backend cluster is recovering after a miss-speculation or a Store …
102 "EventCode": "0x0d",
103 "Counter": "0,1,2,3,4,5,6,7",
104 "UMask": "0x80",
105 "PEBScounters": "0,1,2,3,4,5,6,7",
113 "EventCode": "0x0E",
114 "Counter": "0,1,2,3,4,5,6,7",
115 "UMask": "0x1",
116 "PEBScounters": "0,1,2,3,4,5,6,7",
124 "EventCode": "0x0E",
126 "Counter": "0,1,2,3,4,5,6,7",
127 "UMask": "0x1",
128 "PEBScounters": "0,1,2,3,4,5,6,7",
136 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
137 "EventCode": "0x14",
138 "Counter": "0,1,2,3,4,5,6,7",
139 "UMask": "0x9",
140 "PEBScounters": "0,1,2,3,4,5,6,7",
149 "EventCode": "0x3C",
150 "Counter": "0,1,2,3,4,5,6,7",
151 "PEBScounters": "0,1,2,3,4,5,6,7",
159 "EventCode": "0x3C",
160 "Counter": "0,1,2,3,4,5,6,7",
161 "UMask": "0x1",
162 "PEBScounters": "0,1,2,3,4,5,6,7",
170 "EventCode": "0x3C",
171 "Counter": "0,1,2,3,4,5,6,7",
172 "UMask": "0x2",
173 "PEBScounters": "0,1,2,3,4,5,6,7",
180 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
181 "EventCode": "0x4c",
182 "Counter": "0,1,2,3",
183 "UMask": "0x1",
184 "PEBScounters": "0,1,2,3",
191 … This is usually caused when the front-end pipeline runs into stravation periods (e.g. branch misp…
192 "EventCode": "0x5E",
193 "Counter": "0,1,2,3,4,5,6,7",
194 "UMask": "0x1",
195 "PEBScounters": "0,1,2,3,4,5,6,7",
202 …servation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (s…
203 "EventCode": "0x5E",
205 "Counter": "0,1,2,3,4,5,6,7",
206 "UMask": "0x1",
207 "PEBScounters": "0,1,2,3,4,5,6,7",
216 …0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the num…
217 "EventCode": "0x87",
218 "Counter": "0,1,2,3",
219 "UMask": "0x1",
220 "PEBScounters": "0,1,2,3",
227 …": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the R…
228 "EventCode": "0xa1",
229 "Counter": "0,1,2,3,4,5,6,7",
230 "UMask": "0x1",
231 "PEBScounters": "0,1,2,3,4,5,6,7",
234 "BriefDescription": "Number of uops executed on port 0"
238 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
239 "EventCode": "0xa1",
240 "Counter": "0,1,2,3,4,5,6,7",
241 "UMask": "0x2",
242 "PEBScounters": "0,1,2,3,4,5,6,7",
249 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
250 "EventCode": "0xa1",
251 "Counter": "0,1,2,3,4,5,6,7",
252 "UMask": "0x4",
253 "PEBScounters": "0,1,2,3,4,5,6,7",
260 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
261 "EventCode": "0xa1",
262 "Counter": "0,1,2,3,4,5,6,7",
263 "UMask": "0x10",
264 "PEBScounters": "0,1,2,3,4,5,6,7",
271 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
272 "EventCode": "0xa1",
273 "Counter": "0,1,2,3,4,5,6,7",
274 "UMask": "0x20",
275 "PEBScounters": "0,1,2,3,4,5,6,7",
282 …": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the R…
283 "EventCode": "0xa1",
284 "Counter": "0,1,2,3,4,5,6,7",
285 "UMask": "0x40",
286 "PEBScounters": "0,1,2,3,4,5,6,7",
289 "BriefDescription": "Number of uops executed on port 6"
293 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
294 "EventCode": "0xa1",
295 "Counter": "0,1,2,3,4,5,6,7",
296 "UMask": "0x80",
297 "PEBScounters": "0,1,2,3,4,5,6,7",
304 "EventCode": "0xa2",
305 "Counter": "0,1,2,3,4,5,6,7",
306 "UMask": "0x2",
307 "PEBScounters": "0,1,2,3,4,5,6,7",
314 …B) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-e…
315 "EventCode": "0xA2",
316 "Counter": "0,1,2,3,4,5,6,7",
317 "UMask": "0x8",
318 "PEBScounters": "0,1,2,3,4,5,6,7",
325 "EventCode": "0xA3",
326 "Counter": "0,1,2,3",
327 "UMask": "0x1",
328 "PEBScounters": "0,1,2,3",
336 "EventCode": "0xA3",
337 "Counter": "0,1,2,3,4,5,6,7",
338 "UMask": "0x4",
339 "PEBScounters": "0,1,2,3,4,5,6,7",
347 "EventCode": "0xA3",
348 "Counter": "0,1,2,3",
349 "UMask": "0x5",
350 "PEBScounters": "0,1,2,3",
358 "EventCode": "0xA3",
359 "Counter": "0,1,2,3",
360 "UMask": "0x8",
361 "PEBScounters": "0,1,2,3",
369 "EventCode": "0xA3",
370 "Counter": "0,1,2,3",
371 "UMask": "0xc",
372 "PEBScounters": "0,1,2,3",
380 "EventCode": "0xA3",
381 "Counter": "0,1,2,3,4,5,6,7",
382 "UMask": "0x10",
383 "PEBScounters": "0,1,2,3,4,5,6,7",
391 "EventCode": "0xA3",
392 "Counter": "0,1,2,3,4,5,6,7",
393 "UMask": "0x14",
394 "PEBScounters": "0,1,2,3,4,5,6,7",
403 "EventCode": "0xa6",
404 "Counter": "0,1,2,3,4,5,6,7",
405 "UMask": "0x2",
406 "PEBScounters": "0,1,2,3,4,5,6,7",
414 "EventCode": "0xa6",
415 "Counter": "0,1,2,3,4,5,6,7",
416 "UMask": "0x4",
417 "PEBScounters": "0,1,2,3,4,5,6,7",
425 "EventCode": "0xA6",
426 "Counter": "0,1,2,3,4,5,6,7",
427 "UMask": "0x40",
428 "PEBScounters": "0,1,2,3,4,5,6,7",
437 "EventCode": "0xa6",
438 "Counter": "0,1,2,3,4,5,6,7",
439 "UMask": "0x80",
440 "PEBScounters": "0,1,2,3,4,5,6,7",
447 …"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream D…
448 "EventCode": "0xA8",
449 "Counter": "0,1,2,3",
450 "UMask": "0x1",
451 "PEBScounters": "0,1,2,3",
458 …iption": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",
459 "EventCode": "0xA8",
460 "Counter": "0,1,2,3",
461 "UMask": "0x1",
462 "PEBScounters": "0,1,2,3",
470 …": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",
471 "EventCode": "0xa8",
472 "Counter": "0,1,2,3",
473 "UMask": "0x1",
474 "PEBScounters": "0,1,2,3",
482 "EventCode": "0xB1",
483 "Counter": "0,1,2,3,4,5,6,7",
484 "UMask": "0x1",
485 "PEBScounters": "0,1,2,3,4,5,6,7",
488 "BriefDescription": "Counts the number of uops to be executed per-thread each cycle."
493 "EventCode": "0xB1",
495 "Counter": "0,1,2,3,4,5,6,7",
496 "UMask": "0x1",
497 "PEBScounters": "0,1,2,3,4,5,6,7",
505 "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
506 "EventCode": "0xb1",
507 "Counter": "0,1,2,3,4,5,6,7",
508 "UMask": "0x1",
509 "PEBScounters": "0,1,2,3,4,5,6,7",
512 "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
517 "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
518 "EventCode": "0xb1",
519 "Counter": "0,1,2,3,4,5,6,7",
520 "UMask": "0x1",
521 "PEBScounters": "0,1,2,3,4,5,6,7",
524 "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
529 "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
530 "EventCode": "0xb1",
531 "Counter": "0,1,2,3,4,5,6,7",
532 "UMask": "0x1",
533 "PEBScounters": "0,1,2,3,4,5,6,7",
536 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
541 "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
542 "EventCode": "0xb1",
543 "Counter": "0,1,2,3,4,5,6,7",
544 "UMask": "0x1",
545 "PEBScounters": "0,1,2,3,4,5,6,7",
548 "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
554 "EventCode": "0xB1",
555 "Counter": "0,1,2,3,4,5,6,7",
556 "UMask": "0x2",
557 "PEBScounters": "0,1,2,3,4,5,6,7",
564 …"PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physic…
565 "EventCode": "0xB1",
566 "Counter": "0,1,2,3,4,5,6,7",
567 "UMask": "0x2",
568 "PEBScounters": "0,1,2,3,4,5,6,7",
571 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
576 …"PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on phys…
577 "EventCode": "0xB1",
578 "Counter": "0,1,2,3,4,5,6,7",
579 "UMask": "0x2",
580 "PEBScounters": "0,1,2,3,4,5,6,7",
583 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
588 …"PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on phys…
589 "EventCode": "0xB1",
590 "Counter": "0,1,2,3,4,5,6,7",
591 "UMask": "0x2",
592 "PEBScounters": "0,1,2,3,4,5,6,7",
595 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
600 …"PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on phys…
601 "EventCode": "0xB1",
602 "Counter": "0,1,2,3,4,5,6,7",
603 "UMask": "0x2",
604 "PEBScounters": "0,1,2,3,4,5,6,7",
607 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
613 "EventCode": "0xB1",
614 "Counter": "0,1,2,3,4,5,6,7",
615 "UMask": "0x10",
616 "PEBScounters": "0,1,2,3,4,5,6,7",
623 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
624 "EventCode": "0xC0",
625 "Counter": "0,1,2,3,4,5,6,7",
626 "PEBScounters": "0,1,2,3,4,5,6,7",
629 "BriefDescription": "Number of instructions retired. General Counter - architectural event"
634 "EventCode": "0xC2",
636 "Counter": "0,1,2,3,4,5,6,7",
637 "UMask": "0x2",
638 "PEBScounters": "0,1,2,3,4,5,6,7",
647 "EventCode": "0xc2",
648 "Counter": "0,1,2,3,4,5,6,7",
649 "UMask": "0x2",
650 "PEBScounters": "0,1,2,3,4,5,6,7",
658 "EventCode": "0xC3",
659 "Counter": "0,1,2,3,4,5,6,7",
660 "UMask": "0x1",
661 "PEBScounters": "0,1,2,3,4,5,6,7",
670 … "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
671 "EventCode": "0xC3",
672 "Counter": "0,1,2,3,4,5,6,7",
673 "UMask": "0x4",
674 "PEBScounters": "0,1,2,3,4,5,6,7",
677 "BriefDescription": "Self-modifying code (SMC) detected."
683 "EventCode": "0xC4",
684 "Counter": "0,1,2,3,4,5,6,7",
685 "PEBScounters": "0,1,2,3,4,5,6,7",
694 "EventCode": "0xc4",
695 "Counter": "0,1,2,3,4,5,6,7",
696 "UMask": "0x1",
697 "PEBScounters": "0,1,2,3,4,5,6,7",
706 "EventCode": "0xC4",
707 "Counter": "0,1,2,3,4,5,6,7",
708 "UMask": "0x2",
709 "PEBScounters": "0,1,2,3,4,5,6,7",
718 "EventCode": "0xC4",
719 "Counter": "0,1,2,3,4,5,6,7",
720 "UMask": "0x8",
721 "PEBScounters": "0,1,2,3,4,5,6,7",
730 "EventCode": "0xC4",
731 "Counter": "0,1,2,3,4,5,6,7",
732 "UMask": "0x10",
733 "PEBScounters": "0,1,2,3,4,5,6,7",
742 "EventCode": "0xc4",
743 "Counter": "0,1,2,3,4,5,6,7",
744 "UMask": "0x11",
745 "PEBScounters": "0,1,2,3,4,5,6,7",
754 "EventCode": "0xC4",
755 "Counter": "0,1,2,3,4,5,6,7",
756 "UMask": "0x20",
757 "PEBScounters": "0,1,2,3,4,5,6,7",
766 "EventCode": "0xC4",
767 "Counter": "0,1,2,3,4,5,6,7",
768 "UMask": "0x40",
769 "PEBScounters": "0,1,2,3,4,5,6,7",
778 "EventCode": "0xc4",
779 "Counter": "0,1,2,3,4,5,6,7",
780 "UMask": "0x80",
781 "PEBScounters": "0,1,2,3,4,5,6,7",
790 "EventCode": "0xC5",
791 "Counter": "0,1,2,3,4,5,6,7",
792 "PEBScounters": "0,1,2,3,4,5,6,7",
802 "EventCode": "0xc5",
803 "Counter": "0,1,2,3,4,5,6,7",
804 "UMask": "0x1",
805 "PEBScounters": "0,1,2,3,4,5,6,7",
815 "EventCode": "0xc5",
816 "Counter": "0,1,2,3,4,5,6,7",
817 "UMask": "0x11",
818 "PEBScounters": "0,1,2,3,4,5,6,7",
828 "EventCode": "0xC5",
829 "Counter": "0,1,2,3,4,5,6,7",
830 "UMask": "0x20",
831 "PEBScounters": "0,1,2,3,4,5,6,7",
840 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
841 "EventCode": "0xC5",
842 "Counter": "0,1,2,3,4,5,6,7",
843 "UMask": "0x80",
844 "PEBScounters": "0,1,2,3,4,5,6,7",
847 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
853 "EventCode": "0xcc",
854 "Counter": "0,1,2,3,4,5,6,7",
855 "UMask": "0x20",
856 "PEBScounters": "0,1,2,3,4,5,6,7",
863 "EventCode": "0xcc",
864 "Counter": "0,1,2,3,4,5,6,7",
865 "UMask": "0x40",
872 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
873 "EventCode": "0xE6",
874 "Counter": "0,1,2,3",
875 "UMask": "0x1",
876 "PEBScounters": "0,1,2,3",
884 "EventCode": "0xec",
885 "Counter": "0,1,2,3,4,5,6,7",
886 "UMask": "0x2",
887 "PEBScounters": "0,1,2,3,4,5,6,7",