Lines Matching +full:front +full:- +full:end
121 …etch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity…
128 …etch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity…
132 …tch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity…
139 …tch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity…
154 … to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
165 …red by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
177 …red by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-e…
185 …n": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not sta…
190 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
197 "BriefDescription": "DSB-to-MITE switch true penalty cycles."
202 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
277 …d after an interval where the front-end delivered no uops for a period of 2 cycles which was not i…
286 …d after an interval where the front-end delivered no uops for a period of 2 cycles which was not i…
292 …d after an interval where the front-end delivered no uops for a period of 4 cycles which was not i…
301 …d after an interval where the front-end delivered no uops for a period of 4 cycles which was not i…
307 …ions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this …
316 …d after an interval where the front-end delivered no uops for a period of 8 cycles which was not i…
322 …ons that are delivered to the back-end after a front-end stall of at least 16 cycles. During this …
331 …d after an interval where the front-end delivered no uops for a period of 16 cycles which was not …
337 …ons that are delivered to the back-end after a front-end stall of at least 32 cycles. During this …
346 …d after an interval where the front-end delivered no uops for a period of 32 cycles which was not …
352 …d after an interval where the front-end delivered no uops for a period of 64 cycles which was not …
361 …d after an interval where the front-end delivered no uops for a period of 64 cycles which was not …
367 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
376 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not …
382 … after an interval where the front-end delivered no uops for a period of 256 cycles which was not …
391 … after an interval where the front-end delivered no uops for a period of 256 cycles which was not …
397 … after an interval where the front-end delivered no uops for a period of 512 cycles which was not …
406 … after an interval where the front-end delivered no uops for a period of 512 cycles which was not …
412 …delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles.…
421 …ter an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was …