Lines Matching +full:2 +full:a
3 "CollectPEBSRecord": "2",
6 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
14 "CollectPEBSRecord": "2",
17 "Counter": "0,1,2,3",
19 "PEBScounters": "0,1,2,3",
26 "CollectPEBSRecord": "2",
29 "Counter": "0,1,2,3",
31 "PEBScounters": "0,1,2,3",
38 "CollectPEBSRecord": "2",
41 "Counter": "0,1,2,3",
43 "PEBScounters": "0,1,2,3",
49 "CollectPEBSRecord": "2",
52 "Counter": "0,1,2,3",
54 "PEBScounters": "0,1,2,3",
61 "CollectPEBSRecord": "2",
64 "Counter": "0,1,2,3",
66 "PEBScounters": "0,1,2,3",
73 "CollectPEBSRecord": "2",
76 "Counter": "0,1,2,3",
78 "PEBScounters": "0,1,2,3",
86 "CollectPEBSRecord": "2",
89 "Counter": "0,1,2,3",
91 "PEBScounters": "0,1,2,3",
97 "CollectPEBSRecord": "2",
100 "Counter": "0,1,2,3",
102 "PEBScounters": "0,1,2,3",
109 "CollectPEBSRecord": "2",
110 …n": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The leg…
112 "Counter": "0,1,2,3",
114 "PEBScounters": "0,1,2,3",
117 "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss."
120 "CollectPEBSRecord": "2",
123 "Counter": "0,1,2,3",
125 "PEBScounters": "0,1,2,3",
131 "CollectPEBSRecord": "2",
134 "Counter": "0,1,2,3",
136 "PEBScounters": "0,1,2,3",
142 "CollectPEBSRecord": "2",
143 …"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag …
145 "Counter": "0,1,2,3",
147 "PEBScounters": "0,1,2,3",
150 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss."
153 "CollectPEBSRecord": "2",
154 …ipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
156 "Counter": "0,1,2,3,4,5,6,7",
158 "PEBScounters": "0,1,2,3,4,5,6,7",
164 "CollectPEBSRecord": "2",
165 …ipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
167 "Counter": "0,1,2,3,4,5,6,7",
169 "PEBScounters": "0,1,2,3,4,5,6,7",
176 "CollectPEBSRecord": "2",
177 …ipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
180 "Counter": "0,1,2,3,4,5,6,7",
182 "PEBScounters": "0,1,2,3,4,5,6,7",
189 "CollectPEBSRecord": "2",
190 …a Uop-cache that holds translations of previously fetched instructions that were decoded by the le…
192 "Counter": "0,1,2,3",
194 "PEBScounters": "0,1,2,3",
201 "CollectPEBSRecord": "2",
205 "Counter": "0,1,2,3,4,5,6,7",
207 "PEBScounters": "0,1,2,3,4,5,6,7",
216 "CollectPEBSRecord": "2",
220 "Counter": "0,1,2,3,4,5,6,7",
222 "PEBScounters": "0,1,2,3,4,5,6,7",
231 "CollectPEBSRecord": "2",
235 "Counter": "0,1,2,3,4,5,6,7",
237 "PEBScounters": "0,1,2,3,4,5,6,7",
246 "CollectPEBSRecord": "2",
250 "Counter": "0,1,2,3,4,5,6,7",
252 "PEBScounters": "0,1,2,3,4,5,6,7",
261 "CollectPEBSRecord": "2",
262 …"PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss.…
265 "Counter": "0,1,2,3,4,5,6,7",
267 "PEBScounters": "0,1,2,3,4,5,6,7",
271 "BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",
276 "CollectPEBSRecord": "2",
277 …interval where the front-end delivered no uops for a period of 2 cycles which was not interrupted …
280 "Counter": "0,1,2,3,4,5,6,7",
282 "PEBScounters": "0,1,2,3,4,5,6,7",
286 …interval where the front-end delivered no uops for a period of 2 cycles which was not interrupted …
291 "CollectPEBSRecord": "2",
292 …interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted …
295 "Counter": "0,1,2,3,4,5,6,7",
297 "PEBScounters": "0,1,2,3,4,5,6,7",
301 …interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted …
306 "CollectPEBSRecord": "2",
307 …ion": "Counts retired instructions that are delivered to the back-end after a front-end stall of a…
310 "Counter": "0,1,2,3,4,5,6,7",
312 "PEBScounters": "0,1,2,3,4,5,6,7",
316 …interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted …
321 "CollectPEBSRecord": "2",
322 …ion": "Counts retired instructions that are delivered to the back-end after a front-end stall of a…
325 "Counter": "0,1,2,3,4,5,6,7",
327 "PEBScounters": "0,1,2,3,4,5,6,7",
331 …nterval where the front-end delivered no uops for a period of 16 cycles which was not interrupted …
336 "CollectPEBSRecord": "2",
337 …ion": "Counts retired instructions that are delivered to the back-end after a front-end stall of a…
340 "Counter": "0,1,2,3,4,5,6,7",
342 "PEBScounters": "0,1,2,3,4,5,6,7",
346 …nterval where the front-end delivered no uops for a period of 32 cycles which was not interrupted …
351 "CollectPEBSRecord": "2",
352 …nterval where the front-end delivered no uops for a period of 64 cycles which was not interrupted …
355 "Counter": "0,1,2,3,4,5,6,7",
357 "PEBScounters": "0,1,2,3,4,5,6,7",
361 …nterval where the front-end delivered no uops for a period of 64 cycles which was not interrupted …
366 "CollectPEBSRecord": "2",
367 …nterval where the front-end delivered no uops for a period of 128 cycles which was not interrupted…
370 "Counter": "0,1,2,3,4,5,6,7",
372 "PEBScounters": "0,1,2,3,4,5,6,7",
376 …nterval where the front-end delivered no uops for a period of 128 cycles which was not interrupted…
381 "CollectPEBSRecord": "2",
382 …nterval where the front-end delivered no uops for a period of 256 cycles which was not interrupted…
385 "Counter": "0,1,2,3,4,5,6,7",
387 "PEBScounters": "0,1,2,3,4,5,6,7",
391 …nterval where the front-end delivered no uops for a period of 256 cycles which was not interrupted…
396 "CollectPEBSRecord": "2",
397 …nterval where the front-end delivered no uops for a period of 512 cycles which was not interrupted…
400 "Counter": "0,1,2,3,4,5,6,7",
402 "PEBScounters": "0,1,2,3,4,5,6,7",
406 …nterval where the front-end delivered no uops for a period of 512 cycles which was not interrupted…
411 "CollectPEBSRecord": "2",
412 … the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-sl…
415 "Counter": "0,1,2,3,4,5,6,7",
417 "PEBScounters": "0,1,2,3,4,5,6,7",
421 …where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted …