Lines Matching full:3

42         "Counter": "0,1,2,3",
47 "CounterHTOff": "0,1,2,3,4,5,6,7"
52 "Counter": "0,1,2,3",
57 "CounterHTOff": "0,1,2,3,4,5,6,7"
62 "Counter": "0,1,2,3",
67 "CounterHTOff": "0,1,2,3,4,5,6,7"
72 "Counter": "0,1,2,3",
78 "CounterHTOff": "0,1,2,3,4,5,6,7"
83 "Counter": "0,1,2,3",
90 "CounterHTOff": "0,1,2,3,4,5,6,7"
95 "Counter": "0,1,2,3",
100 "CounterHTOff": "0,1,2,3,4,5,6,7"
105 "Counter": "0,1,2,3",
111 "CounterHTOff": "0,1,2,3"
116 "Counter": "0,1,2,3",
123 "CounterHTOff": "0,1,2,3"
128 "Counter": "0,1,2,3",
133 "CounterHTOff": "0,1,2,3,4,5,6,7"
136 …"PublicDescription": "Number of slow LEA or similar uops allocated. Such uop has 3 sources (for ex…
138 "Counter": "0,1,2,3",
142 …w LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sour…
143 "CounterHTOff": "0,1,2,3,4,5,6,7"
148 "Counter": "0,1,2,3",
153 "CounterHTOff": "0,1,2,3,4,5,6,7"
157 "Counter": "0,1,2,3",
162 "CounterHTOff": "0,1,2,3,4,5,6,7"
167 "Counter": "0,1,2,3",
172 "CounterHTOff": "0,1,2,3,4,5,6,7"
176 "Counter": "0,1,2,3",
182 "CounterHTOff": "0,1,2,3,4,5,6,7"
187 "Counter": "0,1,2,3",
192 "CounterHTOff": "0,1,2,3,4,5,6,7"
197 "Counter": "0,1,2,3",
203 "CounterHTOff": "0,1,2,3,4,5,6,7"
208 "Counter": "0,1,2,3",
213 "CounterHTOff": "0,1,2,3,4,5,6,7"
218 "Counter": "0,1,2,3",
224 "CounterHTOff": "0,1,2,3,4,5,6,7"
228 "Counter": "0,1,2,3",
233 "CounterHTOff": "0,1,2,3"
237 "Counter": "0,1,2,3",
242 "CounterHTOff": "0,1,2,3,4,5,6,7"
247 "Counter": "0,1,2,3",
252 "CounterHTOff": "0,1,2,3,4,5,6,7"
257 "Counter": "0,1,2,3",
262 "CounterHTOff": "0,1,2,3,4,5,6,7"
267 "Counter": "0,1,2,3",
272 "CounterHTOff": "0,1,2,3,4,5,6,7"
277 "Counter": "0,1,2,3",
282 "CounterHTOff": "0,1,2,3,4,5,6,7"
287 "Counter": "0,1,2,3",
292 "CounterHTOff": "0,1,2,3,4,5,6,7"
297 "Counter": "0,1,2,3",
302 "CounterHTOff": "0,1,2,3,4,5,6,7"
307 "Counter": "0,1,2,3",
312 "CounterHTOff": "0,1,2,3,4,5,6,7"
317 "Counter": "0,1,2,3",
324 "CounterHTOff": "0,1,2,3,4,5,6,7"
329 "Counter": "0,1,2,3",
334 "CounterHTOff": "0,1,2,3,4,5,6,7"
339 "Counter": "0,1,2,3",
344 "CounterHTOff": "0,1,2,3,4,5,6,7"
348 "Counter": "0,1,2,3",
353 "CounterHTOff": "0,1,2,3,4,5,6,7"
357 "Counter": "0,1,2,3",
362 "CounterHTOff": "0,1,2,3,4,5,6,7"
366 "Counter": "0,1,2,3",
371 "CounterHTOff": "0,1,2,3,4,5,6,7"
375 "Counter": "0,1,2,3",
380 "CounterHTOff": "0,1,2,3,4,5,6,7"
384 "Counter": "0,1,2,3",
389 "CounterHTOff": "0,1,2,3,4,5,6,7"
393 "Counter": "0,1,2,3",
398 "CounterHTOff": "0,1,2,3,4,5,6,7"
402 "Counter": "0,1,2,3",
407 "CounterHTOff": "0,1,2,3,4,5,6,7"
411 "Counter": "0,1,2,3",
416 "CounterHTOff": "0,1,2,3,4,5,6,7"
420 "Counter": "0,1,2,3",
425 "CounterHTOff": "0,1,2,3,4,5,6,7"
429 "Counter": "0,1,2,3",
434 "CounterHTOff": "0,1,2,3,4,5,6,7"
438 "Counter": "0,1,2,3",
443 "CounterHTOff": "0,1,2,3,4,5,6,7"
447 "Counter": "0,1,2,3",
452 "CounterHTOff": "0,1,2,3,4,5,6,7"
457 "Counter": "0,1,2,3",
462 "CounterHTOff": "0,1,2,3,4,5,6,7"
466 "Counter": "0,1,2,3",
471 "CounterHTOff": "0,1,2,3,4,5,6,7"
475 "Counter": "0,1,2,3",
480 "CounterHTOff": "0,1,2,3,4,5,6,7"
484 "Counter": "0,1,2,3",
489 "CounterHTOff": "0,1,2,3,4,5,6,7"
493 "Counter": "0,1,2,3",
498 "CounterHTOff": "0,1,2,3,4,5,6,7"
502 "Counter": "0,1,2,3",
507 "CounterHTOff": "0,1,2,3,4,5,6,7"
511 "Counter": "0,1,2,3",
516 "CounterHTOff": "0,1,2,3,4,5,6,7"
520 "Counter": "0,1,2,3",
525 "CounterHTOff": "0,1,2,3,4,5,6,7"
530 "Counter": "0,1,2,3",
535 "CounterHTOff": "0,1,2,3,4,5,6,7"
540 "Counter": "0,1,2,3",
545 "CounterHTOff": "0,1,2,3,4,5,6,7"
550 "Counter": "0,1,2,3",
556 "CounterHTOff": "0,1,2,3,4,5,6,7"
560 "Counter": "0,1,2,3",
565 "CounterHTOff": "0,1,2,3,4,5,6,7"
570 "Counter": "0,1,2,3",
575 "CounterHTOff": "0,1,2,3,4,5,6,7"
580 "Counter": "0,1,2,3",
586 "CounterHTOff": "0,1,2,3,4,5,6,7"
590 "Counter": "0,1,2,3",
595 "CounterHTOff": "0,1,2,3,4,5,6,7"
600 "Counter": "0,1,2,3",
605 "CounterHTOff": "0,1,2,3,4,5,6,7"
609 "Counter": "0,1,2,3",
615 "CounterHTOff": "0,1,2,3,4,5,6,7"
619 "Counter": "0,1,2,3",
624 "CounterHTOff": "0,1,2,3,4,5,6,7"
627 "PublicDescription": "Cycles which a uop is dispatched on port 3 in this thread.",
629 "Counter": "0,1,2,3",
633 "BriefDescription": "Cycles per thread when uops are executed in port 3",
634 "CounterHTOff": "0,1,2,3,4,5,6,7"
638 "Counter": "0,1,2,3",
643 "BriefDescription": "Cycles per core when uops are dispatched to port 3.",
644 "CounterHTOff": "0,1,2,3,4,5,6,7"
648 "Counter": "0,1,2,3",
652 "BriefDescription": "Cycles per thread when uops are executed in port 3.",
653 "CounterHTOff": "0,1,2,3,4,5,6,7"
658 "Counter": "0,1,2,3",
663 "CounterHTOff": "0,1,2,3,4,5,6,7"
668 "Counter": "0,1,2,3",
674 "CounterHTOff": "0,1,2,3,4,5,6,7"
678 "Counter": "0,1,2,3",
683 "CounterHTOff": "0,1,2,3,4,5,6,7"
688 "Counter": "0,1,2,3",
693 "CounterHTOff": "0,1,2,3,4,5,6,7"
698 "Counter": "0,1,2,3",
704 "CounterHTOff": "0,1,2,3,4,5,6,7"
708 "Counter": "0,1,2,3",
713 "CounterHTOff": "0,1,2,3,4,5,6,7"
718 "Counter": "0,1,2,3",
723 "CounterHTOff": "0,1,2,3,4,5,6,7"
728 "Counter": "0,1,2,3",
734 "CounterHTOff": "0,1,2,3,4,5,6,7"
738 "Counter": "0,1,2,3",
743 "CounterHTOff": "0,1,2,3,4,5,6,7"
748 "Counter": "0,1,2,3",
753 "CounterHTOff": "0,1,2,3,4,5,6,7"
757 "Counter": "0,1,2,3",
763 "CounterHTOff": "0,1,2,3,4,5,6,7"
767 "Counter": "0,1,2,3",
772 "CounterHTOff": "0,1,2,3,4,5,6,7"
777 "Counter": "0,1,2,3",
783 "CounterHTOff": "0,1,2,3,4,5,6,7"
787 "Counter": "0,1,2,3",
792 "CounterHTOff": "0,1,2,3,4,5,6,7"
797 "Counter": "0,1,2,3",
802 "CounterHTOff": "0,1,2,3,4,5,6,7"
806 "Counter": "0,1,2,3",
811 "CounterHTOff": "0,1,2,3,4,5,6,7"
816 "Counter": "0,1,2,3",
823 "CounterHTOff": "0,1,2,3,4,5,6,7"
828 "Counter": "0,1,2,3",
834 "CounterHTOff": "0,1,2,3"
839 "Counter": "0,1,2,3",
845 "CounterHTOff": "0,1,2,3"
850 "Counter": "0,1,2,3",
856 "CounterHTOff": "0,1,2,3"
861 "Counter": "0,1,2,3",
867 "CounterHTOff": "0,1,2,3"
894 "Counter": "0,1,2,3",
899 "CounterHTOff": "0,1,2,3,4,5,6,7"
903 "Counter": "0,1,2,3",
909 "CounterHTOff": "0,1,2,3,4,5,6,7"
913 "Counter": "0,1,2,3",
919 "CounterHTOff": "0,1,2,3,4,5,6,7"
924 "Counter": "0,1,2,3",
931 "CounterHTOff": "0,1,2,3"
936 "Counter": "0,1,2,3",
943 "CounterHTOff": "0,1,2,3"
948 "Counter": "0,1,2,3",
955 "CounterHTOff": "0,1,2,3"
960 "Counter": "0,1,2,3",
965 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
966 "CounterMask": "3",
967 "CounterHTOff": "0,1,2,3"
971 "Counter": "0,1,2,3",
978 "CounterHTOff": "0,1,2,3"
983 "Counter": "0,1,2,3",
989 "CounterHTOff": "0,1,2,3,4,5,6,7"
993 "Counter": "0,1,2,3",
1000 "CounterHTOff": "0,1,2,3,4,5,6,7"
1004 "Counter": "0,1,2,3",
1011 "CounterHTOff": "0,1,2,3,4,5,6,7"
1015 "Counter": "0,1,2,3",
1020 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
1021 "CounterMask": "3",
1022 "CounterHTOff": "0,1,2,3,4,5,6,7"
1026 "Counter": "0,1,2,3",
1033 "CounterHTOff": "0,1,2,3,4,5,6,7"
1038 "Counter": "0,1,2,3",
1044 "CounterHTOff": "0,1,2,3,4,5,6,7"
1049 "Counter": "0,1,2,3",
1055 "CounterHTOff": "0,1,2,3,4,5,6,7"
1073 "Counter": "0,1,2,3",
1078 "CounterHTOff": "0,1,2,3,4,5,6,7"
1084 "Counter": "0,1,2,3",
1088 "CounterHTOff": "0,1,2,3,4,5,6,7"
1093 "Counter": "0,1,2,3",
1098 "CounterHTOff": "0,1,2,3,4,5,6,7",
1106 "Counter": "0,1,2,3",
1112 "CounterHTOff": "0,1,2,3"
1119 "Counter": "0,1,2,3",
1125 "CounterHTOff": "0,1,2,3"
1132 "Counter": "0,1,2,3",
1139 "CounterHTOff": "0,1,2,3"
1144 "Counter": "0,1,2,3",
1149 "CounterHTOff": "0,1,2,3,4,5,6,7"
1153 "Counter": "0,1,2,3",
1158 "CounterHTOff": "0,1,2,3,4,5,6,7"
1162 "Counter": "0,1,2,3",
1169 "CounterHTOff": "0,1,2,3,4,5,6,7"
1174 "Counter": "0,1,2,3",
1179 "CounterHTOff": "0,1,2,3,4,5,6,7"
1183 "Counter": "0,1,2,3",
1188 "CounterHTOff": "0,1,2,3,4,5,6,7"
1193 "Counter": "0,1,2,3",
1198 "CounterHTOff": "0,1,2,3,4,5,6,7"
1203 "Counter": "0,1,2,3",
1208 "CounterHTOff": "0,1,2,3,4,5,6,7"
1213 "Counter": "0,1,2,3",
1218 "CounterHTOff": "0,1,2,3,4,5,6,7"
1223 "Counter": "0,1,2,3",
1227 …riefDescription": "Direct and indirect macro near call instructions retired (captured in ring 3).",
1228 "CounterHTOff": "0,1,2,3,4,5,6,7"
1233 "Counter": "0,1,2,3",
1238 "CounterHTOff": "0,1,2,3"
1243 "Counter": "0,1,2,3",
1248 "CounterHTOff": "0,1,2,3,4,5,6,7"
1254 "Counter": "0,1,2,3",
1259 "CounterHTOff": "0,1,2,3,4,5,6,7"
1264 "Counter": "0,1,2,3",
1269 "CounterHTOff": "0,1,2,3,4,5,6,7"
1275 "Counter": "0,1,2,3",
1280 "CounterHTOff": "0,1,2,3,4,5,6,7"
1285 "Counter": "0,1,2,3",
1290 "CounterHTOff": "0,1,2,3,4,5,6,7"
1295 "Counter": "0,1,2,3",
1300 "CounterHTOff": "0,1,2,3,4,5,6,7"
1306 "Counter": "0,1,2,3",
1311 "CounterHTOff": "0,1,2,3"
1316 "Counter": "0,1,2,3",
1321 "CounterHTOff": "0,1,2,3,4,5,6,7"
1326 "Counter": "0,1,2,3",
1331 "CounterHTOff": "0,1,2,3,4,5,6,7"
1336 "Counter": "0,1,2,3",
1341 "CounterHTOff": "0,1,2,3,4,5,6,7"